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Synopsys

Synopsys is looking for ASIC/Layout Design Engineer who will be responsible for design, verification, and documentation for ASIC and contributes to the development of multi-dimensional designs involving the layout of complex integrated circuits.

Key Qualifications

·       Good knowledge of layout and schematic designs. Be familiar with semiconductor physics.
·       Good knowledge of layout of standard cell, IO devises, core devises, resistors and diodes.
·       Good knowledge of physics of ESD, Latch-up, Electromigration and Antenna Effect.
·       Prior knowledge and experience of Custom Compiler tool.
·       Demonstrates good analysis and problem-solving skills.
·       Has a strong desire to learn and explore new technologies.
·       Typically requires no previous professional experience.

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