Synopsys

ASIC Digital Design Engr II (Design Engineer with Formal Verification experience)

The ideal candidate will have a background in RTL design and expertise in Formal verification.

Design expertise includes understanding Standard Specifications/micro-architecture documents, ability to design for low area/power. The designer should have a good understanding of RTL coding guidelines. A hands-on understanding connectivity protocols like Ethernet, USB, SD-MMC, AMBA, and MIPI protocols such as CSI/ DSI/ UFS and Unipro; and working on the design al verification of such IP designs.

Formal verification expertise includes the ability to verify the micro-architecture using formal verification tools to employ the latest model checking and equivalence checking techniques. The ability to understand the design & implementation, define the verification scope, and ensure design correctness and then use advanced formal techniques to obtain full proofs, or sufficient bounded proofs, of the design while working with architects, designers, pre-silicon verification teams.

For more & updated details, hit “Apply for job”