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Job Description and Requirements

– Knowledge of CMOS processes and issues in deep submicron process technologies.

– CMOS circuit design and layout methodology & flow; basic understanding of Standard cell layout, familiarity with basic finfet is an advantage.

– Familiarity with ASIC design flow.

– Ability to execute assigned layout design tasks with best product quality and efficiency.

– Good written and verbal communication skills in interactions with internal development teams.

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