Job Description and Requirements

The ideal candidate will a background in RTL design and expertise in Formal verification.
Design expertise includes understanding Standard Specifications/micro-architecture documents, ability to design for low area/power. The designer should have a good understanding of RTL coding guidelines. A hands-on understanding connectivity protocols like Ethernet, USB, SD-MMC, AMBA, and MIPI protocols such as CSI/ DSI/ UFS and Unipro; and working on the design/formal verification of such IP designs.
Formal verification expertise includes the ability to verify the micro-architecture using formal verification tools to employ the latest model checking and equivalence checking techniques. The ability to understand the design & implementation, define the verification scope, and ensure design correctness and then use advanced formal techniques to obtain full proofs, or sufficient bounded proofs, of the design while working with architects, designers, pre-silicon verification teams. The candidate must be capable of setting up or leading the formal verification effort, collecting coverage data, and communicating verification results and holes to our team.

Key Job Responsibilities:
The specification, implementation, and maintenance of an integrated end-to-end formal verification flow for the formal verification objective.
Guide and train team members on effective usage of FV tools.
Develop/modify scripts to automate the verification process.
Review formal setups and proofs with design and verification teams.
Maintain and extend assertion libraries, including support for both simulation and FV.
Identifying key behaviors for verification of DUT and creating a verification plan.
Developing verification environment including environment assumptions, assertions, and cover properties in context of the verification plan.
Applying various FV techniques to prove correctness of digital designs.
Debugging RTL to identify causes of failure scenarios.

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