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Synopsys

Selected candidate will be part of the DesignWare IP Verification R&D team at Synopsys. He/She will be expected to specify, design/architect and implement state-of-the-art Verification environments for the DesignWare family of synthesizable cores and perform Verification tasks for the IP cores. Candidate will work closely with RTL designers and be part of a global team of experienced Verification Engineers.

Job role will have a combination of Test planning, Test environment coding both at unit level and system level, Test case coding and debugging, FC coding and review and meeting quality metric goals and regression management.

The candidate will be part of the Solutions Group, India. The position offers learning and growth opportunities. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Design & Directed Verification domain.

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