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Synopsys

In this role, you will be part of the Engineering Project Management team overseeing development and implementation of DDR and HBM technical solutions for customer ASICs and SOCs in DDR and HBM PHY Hardening service line, which includes front-end implementation, physical design, verification, design for test and ATPG. You will contribute as a trusted advisor to both internal and external design teams. Ideal background would include hands-on, expert level physical design or implementation of ASICs / SOCs experience using Synopsys EDA toolset, in semiconductor technologies below 16nm. You will be dealing with cutting edge technology from tier one silicon foundries and semiconductor manufacturers, as well as the top technology companies in the world working on SOCs and ASICs. Typical work assignments will include analyzing customer’s requirements and proposing solutions in terms of floorplan, bump map, design for test features, packaging and silicon technology. Upon finalizing a solution, Project Engineering Manager – PEM – will discuss the design ideas with implementation teams, and oversee their execution through all the development stages until delivery and integration into customer’s SOC or ASIC. PEM is the key figure in enforcing Synopsys’ Quality Management System in IP hardening project execution. Additionally, PEMs serve as a conduit into IP R&D of ideas for product improvement based on actual implementation experience. PEM will be regularly contributing ideas to wider audiences, both internal and external, through technical presentations, supporting marketing and sales effort and our customer base.

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