For this position we’re looking to hire a RTL design engineer for the growing Synopsys DesignWare IP development team. You will be participating in the development of DDRPHY IP Architecture and Microarchitecture specifications for the IP. You will also be driving development efforts across geographic locations to create world class winning solutions.

RTL Design Engineer

Job DescriptionWork with architect in design definition and implementation
Develop and maintain design spec and micro-architecture spec
Verilog RTL development and debug
Work with verification team for test plan/strategy to meet all functional requirements and performance
Work with timing and physical team for timing closure and meet power and area goals

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