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Synopsys

Job Description and Requirements

We are a team working on producing the highly optimized hardware IP for the ARC family of 32-bit configurable processors. We are looking for an engineer like you to be part of the team to work on our world-class micro-processors that allow our customers develop highly optimized and very sophisticated embedded designs.

 

Responsibilities

– To define verification strategy and verification plans based on high level specification

–¬† Develop Testbenches using System Verilog and industry methodologies (Eg: OVM, UVM)

–¬† Good debugging skills to clean up the design issues.

–¬† Able to Write testcases in Assembly, System Verilog, UVM

– A minimum of 0-1 years of experience in ASIC design

– Deep knowledge and experience in RISC microprocessor architecture

– Hands-on experience in multi-core, cache coherency is a big plus

РExcellent grasp of Verification methodologies  (System Verilog, OVM, UVM)

 

– Familiar with EDA tools such as, VCS, VERDI, SPYGLASS, etc.

– Good knowledge of programming at assembly and C/C++ level

– Excellent communications skills in English

– Good demonstration of enthusiasm, drive and diligence

– Keen to work in a multi-site global development team

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