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Synopsys

This is a verification focused individual contributor’s role. The candidate will be part of the DesignWare IP Verification R&D team at our Bangalore Design Center, India. Specify, design/architect and implement state-of-the-art Verification environments for the DesignWare family of synthesizable cores and perform Verification tasks for the IP cores. Work closely with RTL design team and be part of a global team of expert Verification Engineers. Domains will include but not be limited to USB, PCI Express, Ethernet, AMBA. Job role will have a combination of Test planning, Test environment coding both at unit level and system level, Test case coding and debugging, FC coding and analysis and meeting quality metric goals and regression management.

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