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Synopsys

This role requires the incumbent to contribute towards back-end design for customer projects, support in revising and debugging existing products, create relevant documentation for company products, and run product QA and resolve issues thereof. This person will also be required to understand the memory compiler development and methodology.

Minimum education and years of experience required : BE in EE with 5+ years of experience in memory full custom layout design. MS with 3+ years of experience in memory full custom layout design.

Required skills: Knowledge of physical design methodologies/ Physical design phases/ Floor planning, Place and route, physical verification, Signal integrity. Memory compiler block placement, power rings and interconnects routing in memory macro . IR/EM analysis of memories including back annotation of layout parasitic, physical verification using DRC and LVS tools. Work with moderate supervision.

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