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Tessolve Semiconductors (a venture of Hero Electronix)

Tessolve Semiconductor

RTL Design / Integrations

Qualification: BE / ME / B.Tech / M.Tech in EEE/ECE/EI/CS
Experience: 4 to 12 years
No of Position: 5+
Location: Bangalore

Requirements:
Responsibilities include RTL development, resolving system-level challenges, architecting, implementing, documenting and validating the memory controller IP cores.
Familiar with different aspects of IP development: micro-architecture, RTL & TB implementation.
Demonstrated success in completing projects using high-speed logic design.
Experience with synthesis, Lint, CDC, and LEC.
Knowledge of protocols such as PCI-Express, RapidIO, NVM Express and LP DDR2/LP DDR3.
Candidate must have excellent Verilog and System Verilog concepts, and experience in verification of complex RTL designs and validating them on the boards is an added advantage.
Working knowledge of UNIX environment and scripting languages (PERL, Python/TCL etc) desired.
Strong analytical skills with attention to detail.
Excellent written & verbal communications skills.
Very good leadership skills.