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Xilinx

Masters/ Bachelors in EE/EC/CS with 4+years of experience in Implementing designs targeting FPGA devices. Strong understanding of FPGA architectures and tools. Should be good in RTL design, CDC, Lint and Spyglass. Proven end to end design of complex IP using Verilog. Strong understanding and experience in design of High Speed serial protocols like PCIe.

 

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