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Xilinx

Xilinx is looking for a talented individual to join the design group in the position of Staff Design Engineer to provide technical leadership towards the development of high speed memory controller designs (operating above 6.4 GHz data rate). This person will possess a deep knowledge in system level challenges, logic design and strong experience architecting complex high speed IP’s.

 

The successful candidate will work as a contributing member and as a lead of a team responsible for the architecture and design of next generation memory interfaces for Xilinx customers. Responsibilities include leading technically a team of designers, resolving system level challenges, architecting, implementing, documenting and validating the memory controller IP cores. The area of focus would be on high speed memory interfaces like DDR5, LPDDR5 DDR4, LPDDR4, and RLDRAM3. The candidate must have excellent inter-personal and communication skills and be able to work independently.

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