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Xilinx

Xilinx Serdes Technology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process. We are currently seeking an analog/mixed-signal design engineer to join our world-class team.

The candidate will be responsible for the design of a high-speed ADC-based receiver, DAC-based transmitter, high performance PLL, or silicon photonics transceivers

– Define circuit architectures optimized for high bandwidth electrical an optical links

– Perform link level simulation in Matlab and/or SPICE to prove the architecture

– Perform design and modeling of on-die RF passive components (e.g., inductors and capacitors) and/or optical structures

– Design circuit components (e.g., DAC, SAR-ADC, S/H, Analog Front-End, PLL, reference generation) required to implement the architecture in advanced FinFET process

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