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Xilinx

The Xilinx Central Engineering Memory Subsystem team is searching for a passionate, adaptable and innovative design engineer to contribute towards the next generation of HBM PHY and more.

Xilinx has an opening for a Senior Hardware Design Engineer in the IP Design team. This position entails working on digital IC design development of PHY and integration of Memory subsystem blocks for next generation FPGAs. Candidate will support varied aspects of the entire design process including RTL design and functional verification, FE design flows and/or synthesis, timing closure, supporting SW views and working with test engineers on silicon verification and characterization.

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