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Xilinx

Xilinx has an opening for a Staff SOC Integration Design Engineer in the SOC Design team. This team is responsible for designing the Processor Sub-system for the Adaptable Compute Acceleration Platform (ACAP).

 

In this highly visible role, you will:

Own the design and implementation of blocks to meet functional, timing, area and power requirements
Guide and review verification for these blocks
Design and implement logic functions that enable efficient test and debug
Participate in silicon bring-up for features owned
Implement Automation to increase design team efficiency
Participate in build management

For additional details and most recent updates, hit “Apply for job”