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Compiled-code Simulation

Faster form for logic simulation
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Description

A logic simulator normally interprets a model of a design by traversing the structure and evaluating each logic element whenever one of its inputs change. Compiled-code simulation relies on the fact that the design will not change. Instead of evaluating each logic element separately and having to schedule the logic elements that are in the fanout list of that logic element for evaluation, the complete combinatorial logic section is replaced by code in the native language of the simulator. It is then compiled at design time and become part of the logic simulator and can be evaluated as a single element whenever one of the inputs changes.