tag: 5nm

On-Chip Power Distribution Modeling Becomes Essential Below 7nm
By Ann Mutschler - 16 Nov, 2022 - Comments: 0

Modeling power distribution in SoCs is becoming increasingly important at each new node and in 3D-ICs, where tolerances involving power are much tighter and any mistake can cause functional failures. At mature nodes, where there is more metal, power problems continue to be rare. But at advanced nodes, where chips are running at higher frequencies and still consuming the same or greater power... » read more

Strategies For Faster Yield Ramps On 5nm Chips
By Laura Peters - 12 Apr, 2022 - Comments: 0

Leading chipmakers TSMC and Samsung are producing 5nm devices in high volume production and TSMC is forging ahead with plans for first 3nm silicon by year end. But to meet such aggressive targets, engineers must identify defects and ramp yield faster than before. Getting a handle on EUV stochastic defects — non-repeating patterning defects such as microbridges, broken lines, or missing con... » read more

Unknowns Driving Up The Cost Of Auto IC Reliability
By Ed Sperling - 08 Feb, 2022 - Comments: 2

Automotive chipmakers are considering a variety of options to improve the reliability of ICs used for everything from sensors to artificial intelligence. But collectively they could boost the number of process steps, increase the time spent in manufacturing and packaging, and stir up concerns about the amount of data that needs to be collected, shared, and stored. Accounting for advanced pro... » read more

End In Sight For Chip Shortages?
By Mark LaPedus - 18 Nov, 2021 - Comments: 2

The current wave of semiconductor and IC packaging shortages is expected to extend well into 2022, but there are also signs that supply may finally catch up with demand. The same is true for manufacturing capacity, materials and equipment in both the semiconductor and packaging sectors. Nonetheless, after a period of shortages in all segments, the current school of thought is that chip suppl... » read more

Fan-Out And Packaging Challenges
By Mark LaPedus - 06 Oct, 2021 - Comments: 2

Semiconductor Engineering sat down to discuss various IC packaging technologies, wafer-level and panel-level approaches, and the need for new materials with William Chen, a fellow at ASE; Michael Kelly, vice president of advanced packaging development and integration at Amkor; Richard Otte, president and CEO of Promex, the parent company of QP Technologies; Michael Liu, senior director of globa... » read more

Building Complex Chips That Last Longer
By Ed Sperling - 23 Sep, 2021 - Comments: 0

Semiconductor Engineering sat down to talk about design challenges in advanced packages and nodes with John Lee, vice president and general manager for semiconductors at Ansys; Shankar Krishnamoorthy, general manager of Synopsys' Design Group; Simon Burke, distinguished engineer at Xilinx; and Andrew Kahng, professor of CSE and ECE at UC San Diego. This discussion was held at the Ansys IDEAS co... » read more

Evaluating The Impact Of STI Recess Profile Control On Advanced FinFET Device Performance
By Coventor - 15 Sep, 2021 - Comments: 1

In this paper, a 5nm FinFET flow was built using the SEMulator3D virtual fabrication platform. Different STI (shallow trench isolation) recess profiles were investigated using the pattern-dependent etch capabilities of SEMulator3D, including changes in trenching/footing profile, fin height and imbalance fin height. The impact of STI recess profile on device performance was then investigated usi... » read more

New Memories Add New Faults
By Bryon Moyer - 07 Sep, 2021 - Comments: 1

New non-volatile memories (NVM) bring new opportunities for changing how we use memory in systems-on-chip (SoCs), but they also add new challenges for making sure they will work as expected. These new memory types – primarily MRAM and ReRAM – rely on unique physical phenomena for storing data. That means that new test sequences and fault models may be needed before they can be released t... » read more

Current And Future Packaging Trends
By Mark LaPedus - 19 Aug, 2021 - Comments: 1

Semiconductor Engineering sat down to discuss IC packaging technology trends and other topics with William Chen, a fellow at ASE; Michael Kelly, vice president of advanced packaging development and integration at Amkor; Richard Otte, president and CEO of Promex, the parent company of QP Technologies; Michael Liu, senior director of global technical marketing at JCET; and Thomas Uhrmann, directo... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 13 Aug, 2021 - Comments: 0

Chipmakers and OEMs Samsung has announced its latest foldable smartphones--the Galaxy Z Fold3 5G and Galaxy Z Flip3 5G. The systems are based on Samsung’s 5nm application processor. One system is the company’s most affordable foldable phone. The Galaxy Z Fold3 is $1,799.99, while the Galaxy Z Flip3 is $999.99. Samsung also announced two smartwatches—the Galaxy Watch4 and Galaxy Watch4... » read more

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