tag: analog

Can Compute-In-Memory Bring New Benefits To Artificial Intelligence Inference?
By Paul Karazuba - 27 Apr, 2023 - Comments: 0

Compute-in-memory (CIM) is not necessarily an Artificial Intelligence (AI) solution; rather, it is a memory management solution. CIM could bring advantages to AI processing by speeding up the multiplication operation at the heart of AI model execution. However, for that to be successful, an AI processing system would need to be explicitly architected to use CIM. The change would entail a shift ... » read more

A Hierarchical And Tractable Mixed-Signal Verification Methodology For First-Generation Analog AI Processors
By Siemens EDA - 22 Mar, 2023 - Comments: 0

Artificial intelligence (AI) is now the key driving force behind advances in information technology, big data and the internet of things (IoT). It is a technology that is developing at a rapid pace, particularly when it comes to the field of deep learning. Researchers are continually creating new variants of deep learning that expand the capabilities of machine learning. But building systems th... » read more

Learning The AMS Circuit Representation From Layout Positions (UT Austin/ NVIDIA)
By Technical Paper Link - 15 Mar, 2023 - Comments: 0

A recent technical paper titled "TAG: Learning Circuit Spatial Embedding From Layouts" was published by researchers at UT Austin and NVIDIA. Abstract "Analog and mixed-signal (AMS) circuit designs still rely on human design expertise. Machine learning has been assisting circuit design automation by replacing human experience with artificial intelligence. This paper presents TAG, a new parad... » read more

Co-Design View of Cross-Bar Based Compute-In-Memory
By Technical Paper Link - 15 Mar, 2023 - Comments: 0

A new review paper titled "Compute in-Memory with Non-Volatile Elements for Neural Networks: A Review from a Co-Design Perspective" was published by researchers at Argonne National Lab, Purdue University, and Indian Institute of Technology Madras. "With an over-arching co-design viewpoint, this review assesses the use of cross-bar based CIM for neural networks, connecting the material proper... » read more

A Hierarchical And Tractable Mixed-Signal Verification Methodology For First-Generation Analog AI Processors
By Siemens EDA - 08 Mar, 2023 - Comments: 0

Artificial intelligence (AI) is now the key driving force behind advances in information technology, big data and the internet of things (IoT). It is a technology that is developing at a rapid pace, particularly when it comes to the field of deep learning. Researchers are continually creating new variants of deep learning that expand the capabilities of machine learning. But building systems th... » read more

Asynchronously Parallel Optimization Method For Sizing Analog Transistors Using Deep Neural Network Learning
By Technical Paper Link - 03 Mar, 2023 - Comments: 0

A new technical paper titled "APOSTLE: Asynchronously Parallel Optimization for Sizing Analog Transistors Using DNN Learning" was published by researchers at UT Austin and Analog Devices. Abstract "Analog circuit sizing is a high-cost process in terms of the manual effort invested and the computation time spent. With rapidly developing technology and high market demand, bringing automated s... » read more

Safety, Security, And Reliability Of AI In Autos
By Ed Sperling - 22 Feb, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about security, aging, and safety in automotive AI systems, with Geoff Tate, CEO of Flex Logix; Veerbhan Kheterpal, CEO of Quadric; Steve Teig, CEO of Perceive; and Kurt Busch, CEO of Syntiant. What follows are excerpts of that conversation, which was held in front of a live audience at DesignCon. Part one of this discussion is he... » read more

Comprehensive S-Parameter Verification Coverage With Analog FastSPICE
By Siemens EDA - 22 Dec, 2022 - Comments: 0

IC design is transforming at an accelerated pace along with fabrication technology. The need to incorporate more functionality has led to denser dies, multi-die chips, stacked 3D ICs and advanced packaging. Furthermore, design technology continues to progress towards supporting higher data rates to address the increasing demand for more and enhanced connectivity. We now must deal with much more... » read more

Repurposing Josephson Junctions At The Cell Boundaries For Fan-out (UCSB)
By Technical Paper Link - 16 Dec, 2022 - Comments: 0

A technical paper titled "Low-Cost Superconducting Fan-Out with Repurposed Josephson Junctions" was published by researchers at UC Santa Barbara.  The paper received an award at the Applied Superconductivity Conference in Oct 2022 and was highlighted in this UCSB news article. Abstract: "Superconductor electronics (SCE) promise computer systems with orders of magnitude higher speeds and lo... » read more

3-to-1 Reconfigurable Analog Signal Modulation Circuit On A Single Device
By Technical Paper Link - 18 Nov, 2022 - Comments: 0

A new technical paper titled "Three-to-one analog signal modulation with a single back-bias-controlled reconfigurable transistor" was published by researchers at NaMLab gGmbH, GlobalFoundries, and TU Dresden. "Reconfigurable field effect transistors are an emerging class of electronic devices, which exploit a structure with multiple independent gates to selectively adjust the charge carrier ... » read more

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