The Week In Review: Design/IoT


Tools Cadence released the new debug platform Indago, with the aim of reducing the time to identify bugs in a design by up to 50 percent compared to traditional signal- or transaction-level debug methods. Included are three debugging apps that provide an integrated debug solution for testbench, verification IP, and hardware/software debug for SoC designs. Mentor Graphics announced three n... » read more

Blog Review: April 29


Start your engines. At the Western US Freescale Cup, ARM's Sadanand Gulwadi had a front-row seat to the ingenuity displayed in autonomous model car racing. From turning an abandoned factory into the world's largest indoor farm to the millions invested in mining passing asteroids, Ansys' Bill Vandermark celebrates a week of Earth Day with his top five picks to read. "There is no Department... » read more

Blog Review: April 22


DARPA thinks machine-brain interfaces are poised to become an industry-changing technology. Rambus' David G. Stork brings us emerging developments in the field from the Neural Engineering Boot Camp. If you live in an area that doesn't get quite enough sun for solar panels, how about a smart window that harvests energy from wind and rain? In this week's top five picks, Ansys' Justin Nescott a... » read more

The Week In Review: Design/IoT


Mergers & Acquisitions ARM made two acquisitions related to Bluetooth radio: Wicentric, a Bluetooth Smart stack and profile provider, and Sunrise Micro Devices (SMD), a provider of sub-one volt Bluetooth radio IP. The IP of both companies will be integrated to form ARM's new low-power radio IP portfolio. Numbers EDA revenue grew 11.9% in Q4 2014 to $2.1 billion, a new record for th... » read more

Blog Review: April 15


How much memory do you need to look 13 billion years in the past? Rambus' Aharon Etengoff ponders the Square Kilometre Array's massive number of radio telescopes and what it means for computing. NXP's Martin Schoessler argues that for smart cities to work for their citizens, both technology companies and government entities will need a new mind-set. Reinventing the wheel is a good thing i... » read more

The Week In Review: Design/IoT


Certifications TSMC certified a number of tools for its current 10nm FinFET design rules and SPICE models and 16nm FinFET Plus (16FF+) V1.0 process, including: Ansys' power integrity and electromigration tools; Cadence's custom/analog and digital implementation and signoff tools; Mentor Graphics' physical verification, design for manufacturing, and circuit verification tools; and Synopsys' ful... » read more

Stacked Die, Phase Two


The initial hype phase of [getkc id="82" kc_name="2.5D"] appears to be over. There are multiple offerings in development or on the market already from Xilinx, Altera, Cisco, Huawei, IBM, AMD, all focused on better throughput over shorter distances with better yield and lower power. Even Intel has jumped on the bandwagon, saying that 2.5D will be essential for extending [getkc id="74" comment="M... » read more

The Wild West Of Automotive


Automotive is considered one of the great new markets for EDA and IP. Electronic complexity is increasing rapidly, product update cycles are decreasing, and new standards mean that many of the old ways of doing development are no longer possible. Such change creates opportunity, along with a certain degreed of confusion. As the number of discrete systems increases, so do costs. Electronics c... » read more

UPF-Driven RTL Power Budgeting For Energy-Efficient Designs


Energy efficiency of devices has become more critical than ever, with shrinking geometries and increased performance requirements of SoCs in applications ranging from mobile, storage, automotive to processors. Power management, therefore, becomes an important part of IP and SoC design methodology. While power management is critical in all design stages, an important aspect of this methodolog... » read more

Blog Review: April 8


No other human endeavor has seen such sustained exponential growth. But it's the end of an era for Moore's Law, says Cadence's Axel Scherer—and only the beginning of one for Moore's Law 2.0. Synopsys' Amit Sharma tackles the cache coherency extensions of the ARM Advanced eXtensible Interface (AXI) and points out that the infrastructure required for their verification needs to scale up in s... » read more

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