tag: ATE

Simplifying The Path From Design To Test
By Richard Fanning - 08 Nov, 2022 - Comments: 0

By Richard Fanning and John Rowe Getting an integrated circuit (IC) from design to test is an arduous process that encompasses a number of steps, including: Design for Test (DFT): processes that ensure the chip is designed in such a way that it can be tested Development: the development of automated test programs (ATPs) Bench: evaluating the device at the bench to ensure the desig... » read more

Test Connections Clean Up With Real-Time Maintenance
By Anne Meixner - 08 Nov, 2022 - Comments: 0

Test facilities are beginning to implement real-time maintenance, rather than scheduled maintenance, to reduce manufacturing costs and boost product yield. Adaptive cleaning of probe needles and test sockets can extend equipment lifetimes and reduce yield excursions. The same is true for load board repair, which is moving toward predictive maintenance. But this change is much more complicate... » read more

Yield Is Top Issue For MicroLEDs
By Laura Peters - 11 Oct, 2022 - Comments: 0

MicroLED display makers are marching toward commercialization, with products such as Samsung’s The Wall TV and Apple’s smart watch expected to be in volume production next year or in 2024. These tiny illuminators are the hot new technology in the display world, enabling higher pixel density, better contrast, lower power consumption, and higher luminance in direct sunlight — while consu... » read more

GaN 8Gbps High-Speed Relay MMIC For Automated Test Equipment
By Advantest - 09 Aug, 2022 - Comments: 0

An 8 Gbps high-speed relay MMIC for an Automated Test Equipment (ATE) using a gallium nitride is developed and evaluated. Metal-Insulator-Semiconductor structure with a tantalum oxynitride is employed to reduce a leakage current for ATE applications. The fabricated MMIC shows 0.3 nA of the leakage current, 12 GHz of a －3 dB bandwidth, and excellent eye-opening of 8 Gbps signals with a 18-lead... » read more

Finding And Applying Domain Expertise In IC Analytics
By Anne Meixner - 12 Apr, 2022 - Comments: 0

Behind PowerPoint slides depicting the data inputs and outputs of a data analytics platform belies the complexity, effort, and expertise that improve fab yield. With the tsunami of data collected for semiconductor devices, fabs need engineers with domain expertise to effectively manage the data and to correctly learn from the data. Naively analyzing a data set can lead to an uninteresting an... » read more

Site-To-Site Variation In Parallel Test
By Ed Seng - 16 Mar, 2022 - Comments: 0

From wafer to system level test, parallel test execution delivers significant benefits, including reduced costs, yet it’s never as simple as that PowerPoint slide you present to management. An engineering effort is required to balance the thermo-electrical challenges that occur as you increase the number of sites to be tested, or the number of slots in a burn-in oven or system level te... » read more

Over-The-Air (OTA) Test Socket And Handler Integration Technology For 5G Mass Production Testing
By Advantest - 11 Jan, 2022 - Comments: 0

This paper presents the integration of socket, measurement antenna and handler for over-the-air (OTA) testing of antenna-in-package (AiP) devices using automated test equipment (ATE) for 5G applications. The design and characteristics of sockets for performing OTA testing in the radiating near field are also discussed. The paper also describes the structure of OTA handler integration using thes... » read more

Big Payback For Combining Different Types Of Fab Data
By Anne Meixner - 07 Dec, 2021 - Comments: 1

Collecting and combining diverse data types from different manufacturing processes can play a significant role in improving semiconductor yield, quality, and reliability, but making that happen requires integrating deep domain expertise from various different process steps and sifting through huge volumes of data scattered across a global supply chain. The semiconductor manufacturing IC data... » read more

Coping With Parallel Test Site-to-Site Variation
By Anne Meixner - 09 Nov, 2021 - Comments: 1

Testing multiple devices in parallel using the same ATE results in reduced test time and lower costs, but it requires engineering finesse to make it so. Minimizing test measurement variation for each device under test (DUT) is a multi-physics problem, and it's one that is becoming more essential to resolve at each new process node and in multi-chip packages. It requires synchronization of el... » read more

High-Speed Image Processing By GPU
By Advantest - 12 Oct, 2021 - Comments: 0

By using CPU and GPU together, we have increased the speed of the filter function that is often used in imaging tests. This feature is provided by the Image Processing Library (IPL) in T2000 CMOS Image Sensor Solution. Next IPE, our new image processing engine that is currently in development, is about six times faster than IPE3 (Image Processing Engine 3), an existing engine. Author: Chiezo... » read more

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