Chip Industry Week In Review

By The SE Staff - 15 Mar, 2024 - Comments: 0

By Adam Kovac, Karen Heyman, and Liz Allan. Europe's semiconductor footprint is growing in areas that previously had little association with chips. Silicon Box plans to build a panel-level foundry in northern Italy, funded in part by the Italian government. The deal is worth around €3.2 billion ($3.6B). In addition, imec will establish a specialized 300mm chip technology pilot line in M... » read more

Backside Power Delivery Adds New Thermal Concerns

By Karen Heyman - 14 Mar, 2024 - Comments: 0

As the semiconductor industry gears up for backside power delivery at the 2nm node, implementation of the technology requires a re-thinking of established design practices. While some EDA tools are already qualified, designers must acquaint themselves with new issues, including making place-and-route more thermal-aware and how to manage heat dissipation with less shielding and thinner substr... » read more

Flash Memory Demystified: NOR Flash Vs. NAND Flash

By Dharini Subashchandran - 14 Mar, 2024 - Comments: 0

By Dharini SubashChandran and Shyam Sharma In the world of flash memory, two primary types dominate the market: NOR flash and NAND flash. While they both serve as essential components in various electronic devices, they differ significantly in terms of structure, functionality, and use cases. In this blog post, we will explore the fundamental differences between NOR flash and NAND flash. ... » read more

The Rising Price Of Power In Chips

By Ed Sperling - 14 Mar, 2024 - Comments: 0

Power is everything when it comes to processing and storing data, and much of it isn't good. Power-related issues, particularly heat, dominate chip and system designs today, and those issues are widening and multiplying. Transistor density has reached a point where these tiny digital switches are generating more heat than can be removed through traditional means. That may sound manageable e... » read more

Photonics: The Former And Future Solution

By Karen Heyman - 14 Mar, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about where photonics is in the hype cycle and its secure role in data centers, with James Pond, fellow at Ansys; Gilles Lamant, distinguished engineer at Cadence; and Mitch Heins, business development manager for photonic solutions at Synopsys. What follows are excerpts of that conversation. [L-R]: Ansys’ Pond, Cadence�... » read more

Overcoming Signal Integrity Challenges Of 112G Connections

By Cadence - 13 Mar, 2024 - Comments: 0

One of the big challenges with 112G SerDes (and, to a lesser extent, all SerDes) is handling signal integrity issues. In the worst case of a long-reach application, the signal starts at the transmitter on one chip, goes from the chip to the package, across a trace on a printed-circuit board (PCB), through a connector, then a cable or backplane, another connector, another PCB trace, another pack... » read more

Blog Review: Mar. 13

By Jesse Allen - 13 Mar, 2024 - Comments: 0

Cadence's Geeta Arora explains the Address Translation Service in PCIe 6.0, which allows an I/O device to perform its own virtual to physical address translations without relying on the host's CPU to reduce latency and improve overall system performance. Synopsys' John Swanson, Jon Ames, Priyank Shukla, and Varun Agrawal highlight the upcoming 1.6T iteration of the Ethernet standard and the ... » read more

Security Is Critical For Commercial Chiplets

By Ann Mutschler - 13 Mar, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the security issues and requirements in commercial chiplet ecosystem, with Frank Schirrmeister, vice president solutions and business development at Arteris; Mayank Bhatnagar, product marketing director in the Silicon Solutions Group at Cadence; Paul Karazuba, vice president of marketing at Expedera; Stephen Slater, EDA prod... » read more

Securing DRAM Against Evolving Rowhammer Threats

By Aharon Etengoff - 07 Mar, 2024 - Comments: 0

Advanced process nodes and higher silicon densities are heightening DRAM's susceptibility to Rowhammer attacks, as reduced cell spacing significantly decreases the hammer count needed for bit flips. Rowhammer exploits DRAM’s single-capacitor-per-bit design to trigger bit flips in adjacent cells through repeated memory row accesses. This vulnerability allows attackers to manipulate data, re... » read more

Digital Twins And AI Acceleration Are Transforming System Design

By Steve Brown - 07 Mar, 2024 - Comments: 0

We are at a global inflection point as we cope with the limitations of energy supply and the consequences of climate change. Regional conflicts are elevating risks in the traditional crude oil supply chain. Changes in rainfall patterns and disputes over water use priorities are limiting hydroelectric power generation. Moreover, extreme weather events have intensified the threat to lives and pro... » read more

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