The Week In Review: Design


Tools & IP Cadence and National Instruments are teaming up with the aim of improving the semiconductor development and test process. The two companies are jointly working on common transistor models to ensure consistent simulation behavior between NI AWR Microwave Office circuit design software and the Cadence Spectre simulation platform. Cadence also launched the Virtuoso RF Solution for ... » read more

Blog Review: Jan. 24


Mentor's Rich Edelman shares some tips for debugging complex UVM testbenches containing multiple agents, multiple checkers, and new HDL. Synopsys' Prasad Subudhi K. S. explains the PCIe PIPE 4.4.1 specification and the major improvements since 4.3, including better optimization in data flow and ultra-low power operations. Cadence's Paul McLellan steps back to before the Meltdown and Spect... » read more

Blog Review: March 1


In a video, Mentor's Wally Rhines discusses the evolution of test methodologies and the forces that will change test priorities. Cadence's Priya Balasubramanian explores memory trends in data servers driven by the Internet's massive need for bandwidth. Synopsys' Aadil Trikha presents a primer on the types of AMBA ACE barrier transactions. ARM's Simon Segars examines the state of IoT de... » read more