tag: Synopsys

IC Compiler II: Finding The Best Floorplan, Fast
By Synopsys - 17 Apr, 2024 - Comments: 0

As designers strive to pack more and more functionality into todays’ SoC’s, design size (in terms of the number of transistors packed into a chip) is growing almost exponentially. This growth brings with it an unbounded increase in not just the technical complexity of performing the physical layout of the design due to capacity challenges, but also requires designers to make choices that ca... » read more

Blog Review: April 17
By Jesse Allen - 17 Apr, 2024 - Comments: 0

Siemens' Sumit Vishwakarma highlights the importance of crystal oscillators to the proper functioning of many semiconductor devices and applications, from clock signals to transmission and reception of radio waves. Cadence's Jay Domadia introduces some of the new features in GDDR7, such as a semi-independent row and column command address bus and two modes of data signaling, enabling PAM3 fo... » read more

Future-Proofing Automotive V2X
By Ann Mutschler - 17 Apr, 2024 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss Vehicle-To-Everything (V2X) technology and the path to deployment with Shawn Carpenter, program director, 5G and space at Ansys; Lang Lin, principal product manager at Ansys; Daniel Dalpiaz, senior manager product marketing, Americas, green industrial power division at Infineon; David Fritz, vice president of virtual and hybrid... » read more

Architecting Chips For High-Performance Computing
By Ann Mutschler - 15 Apr, 2024 - Comments: 0

The world’s leading hyperscaler cloud data center companies — Amazon, Google, Meta, Microsoft, Oracle, and Akamai — are launching heterogeneous, multi-core architectures specifically for the cloud, and the impact is being felt in high-performance CPU development across the chip industry. It's unlikely that any these chips will ever be sold commercially. They are optimized for specific ... » read more

Chip Industry Week In Review
By The SE Staff - 12 Apr, 2024 - Comments: 0

Applied Materials may scale back or cancel its $4 billion new Silicon Valley R&D facility in light of the U.S. government's recent announcement to reduce funding for construction, modernization, or expansion of semiconductor research and development (R&D) facilities in the United States, according to the San Francisco Chronicle. TSMC could receive up to $6.6 billion in direct funding... » read more

Memory On Logic: The Good And Bad
By Brian Bailey - 11 Apr, 2024 - Comments: 0

The chip industry is progressing rapidly toward 3D-ICs, but a simpler step has been shown to provide gains equivalent to a whole node advancement — extracting distributed memories and placing them on top of logic. Memory on logic significantly reduces the distance between logic and directly associated memory. This can increase performance by 22% and reduce power by 36%, according to one re... » read more

Using AI/ML To Minimize IR Drop
By Ann Mutschler - 11 Apr, 2024 - Comments: 1

IR drop is becoming a much bigger problem as technology nodes scale and more components are packed into advanced packages. This is partly a result of physics, but it's also the result of how the design flow is structured. In most cases, AI/ML can help. The underlying problem is that moving to advanced process nodes, and now 3D-ICs, is driving current densities higher, while the power envelop... » read more

Linear Drive Optics May Reduce Data Latency
By Karen Heyman - 11 Apr, 2024 - Comments: 0

Optical and electrical are starting to cross paths at a much deeper level, particularly with the growing focus on 3D-ICs and AI/ML training in data centers, driving changes both in how chips are designed and how these very different technologies are integrated together. At the root of this shift are the power and performance demands of AI/ML. It can now take several buildings of a data cente... » read more

Integrating Energy Efficiency Considerations Into Your Design From The Beginning
By William Ruby - 11 Apr, 2024 - Comments: 0

Data center networking is responsible for consuming about 1% of the global electricity supply. With the advent and integration of AI into various sectors, the pressure on both hardware and software infrastructures, necessitated by neural networks and extensive language models, is expected to increase significantly. The burgeoning energy consumption by hyperscale data centers emerges as an ur... » read more

Unlocking PPA Benefits of Backside Routing
By Synopsys - 10 Apr, 2024 - Comments: 0

The power delivery network (PDN) is a critical part of any modern semiconductor device. Even with advanced power-saving technologies, today’s chips are hungry for power. Traditionally, power is distributed through metal layers on the same side of the substrate as the signal metal layers. This creates competition for the available layers and pushes the limits of fabrication technology to add m... » read more

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