Low Power-High Performance

Top Stories

Will Domain-Specific ICs Become Ubiquitous?

How shifts in end markets and device scaling could alter some fundamental assumptions in chip design.

Running More Efficient AI/ML Code With Neuromorphic Engines

Once a buzzword, neuromorphic engineering is gaining traction in the semiconductor industry.

Power/Performance Costs In Chip Security

Implementing security measures isn't free. It affects everything from latency and battery life to the equipment and processes used to develop a chip.

Design Considerations In Photonics

As photonics and CMOS converge, will design engineers feel comfortable outside of their respective specialties?

Memory On Logic: The Good And Bad

Do the benefits outweigh the costs of using memory on logic as a stepping-stone toward 3D-ICs?

Using AI/ML To Minimize IR Drop

Heterogeneous and advanced-node designs are creating unexpected post-layout challenges for design teams, but some issues can be addressed earlier i...

Linear Drive Optics May Reduce Data Latency

As data demands increase, the photonics industry tries new solutions.

The Challenges Of Working With Photonics

From curvilinear designs to thermal vulnerabilities, what engineers need to know about the advantages and disadvantages of photonics.

Optimizing Energy At The System Level

A lot of effort has gone into optimization of hardware during implementation, but that is a small fraction of the total opportunity.

Backside Power Delivery Adds New Thermal Concerns

Lack of shielding, routing issues, and new mechanical stresses could have broad impact on standard cell design.

More Top Stories »



Round Tables

Design Considerations In Photonics

As photonics and CMOS converge, will design engineers feel comfortable outside of their respective specialties?

The Challenges Of Working With Photonics

From curvilinear designs to thermal vulnerabilities, what engineers need to know about the advantages and disadvantages of photonics.

Photonics: The Former And Future Solution

Twenty-five years ago, photonics was supposed to be the future of high technology. Has that future finally arrived?

Memory’s Future Hinges On Reliability

Robust implementations are a major issue, particularly as memory density increases.

Rethinking Memory

Von Neumann architecture is here to stay, but AI novel architectures and 3D structures create a need for new testing tools.

More Roundtables »



Multimedia

Challenges With Chiplets And Power Delivery

Benefits and challenges in heterogeneous integration.

New Issues In Power Semiconductors

Challenges increase with higher voltage and heterogeneous integration in advanced packages.

Very Short Reach SerDes In Data Centers

Eliminating bottlenecks as the volume of data increases.

Issues In Calculating Glitch Power

Which of the growing number of corners must be addressed?

Changes In Memory Design

Customization, reliability, and much more data are altering how memory is developed and used.

More Multimedia »



See All Posts in Low Power-High Performance »

Latest Blogs

Spotlight On Reliability

Efficient Electronics

Reducing energy consumption involves striking a balance between universal and...
May 16, 2024
IP And LP In SoCs

How To Successfully Deploy GenAI On Edge Devices

Smaller models with fewer parameters put image generators and chatbots within...
May 16, 2024
A Bit About Memory

DDR5 PMICs Enable Smarter, Power-Efficient Memory Modules

Moving power management from the motherboard to the DIMM increases memory per...
May 16, 2024
Everything Low Power

How Quickly Can You Take Your Idea To Chip Design?

Program enables students and hobbyists to get a design fabricated at a fracti...
May 16, 2024
Power Source

Enabling Multiscale Simulation

Converging paths to integrated computational material engineering.
May 16, 2024
At The Core

MPAM-Style Cache Partitioning With ATP-Engine And gem5

Testing system designs that allow privileged software to partition caches, me...
May 16, 2024
Embedded ML Design

Fallback Fails Spectacularly

Shifting inference workloads from the NPU leads to more than just a little sl...
May 16, 2024
Power Architect

TSMC Uncorks A16 With Super Power Rail

Reporter's Notebook: Aggressive roadmap ramps up competition at the leading e...
April 25, 2024
Best Of Both: LP & HP

How To Get Accurate Inductance Extraction For Superconduc...

New physical verification approaches are needed to ensure the performance and...
April 11, 2024
MIPI And Beyond

MIPI In Next Generation Of AI IoT Devices At The Edge

IoT demands a balance between cloud and edge processing to optimize system pe...
April 11, 2024
Design Reuse Made Real

Quantum Computing: Top 5 Questions Answered

Quantum error detection, suppression, and correction strategies are critical ...
March 14, 2024

Knowledge Centers
Entities, people and technologies explored


  Trending Articles

Electromigration Concerns Grow In Advanced Packages

Higher density, heat, and more materials make it harder to ensure reliability.

What Works Best For Chiplets

Not all chiplets are interchangeable, and options will be limited.

EDA Looks Beyond Chips

System design, large-scale simulations, and AI/ML could open multi-trillion-dollar markets for tools, methodologies, and services.

Chip Industry Week In Review

Samsung, Synopsys' GAA processors; UMC's 3D IC process; Si wafer shipments down; SiC wafer processing equipment up; women in CHIPS Act projects; imec startup fund; Infineon, ETAS auto security collab; quantum error correction; Intel's cryogenic probing process.

Is There Any Hope For Asynchronous Design?

This approach has long held promise, but never managed to deliver. Is there a fundamental problem, or is it just bad luck?