Special Report
EVs Raise Energy, Power, And Thermal IC Design Challenges
Changes are required across the entire automotive ecosystem, starting with system modeling and semiconductor design.
Top Stories
Testing Chips For Security
Thinking like a hacker is critical as designs become more heterogeneous and domain-specific.
Auto Safety Tech Adds New IC Design Challenges
More electronics everywhere and more connectivity create issues involving power, performance, cost, and security.
DNA Edges Forward As Data Storage Option
Ability to store huge quantities of data is possible, but getting the cost down is challenging.
Chip Challenges In The Metaverse
Thermal and performance needs will require complex architectures and technology changes, not all of which are available today.
Videos
Simplifying AI Edge Deployment
Keeping device models up to date while optimizing power and performance.
Using eFPGAs For Security
Longer chip lifetimes mean they need to adapt to security threats.
Blogs
Rambus’ Danny Moore examines new use models and increased flexibility in data center architectures, in CXL 3.0: From Expansion To Scaling.
Riscure’s Jasmina Omic explains how to determine robustness of content protection strategies, in DRM Security Trends And Future.
Cadence’s Steve Brown looks at the evolution of electric systems in race cars, in Formula 1: Riding The Sustainability Wave To Full Electrification.
MathWorks’ Eric Cigan and Siemens EDA’s Jacob Wiltgen lay out a flight path to enable conceptual design exploration and verification for airborne electronic hardware, in Streamline DO-254 Compliance With Model-Based Design.
Synopsys’ Dana Neustadter advises that security should be seen as an integral part of design architecture, not an afterthought, in Security For SoC Interfaces Takes Center Stage In Data Protection.
Arteris IP’s Frank Schirrmeister digs into how to deliver best-in-class automotive solutions, in The Automotive Paradigm Shift.
Flex Logix’s Andy Jaros describes using embedded FPGAs in low-power applications, in Put A Data Center In Your Phone!
Industry analyst Anand Joshi looks at how to optimize performance and maximize ROI in new designs, in AI ASICs Will Become Increasingly Application-Specific.
Cycuity’s Jim Robinson puts forward four levels to assess current capabilities and take steps towards end-to-end hardware security verification, in A Security Maturity Model For Hardware Development.
Synopsys’ Ian Land, Jason Niatas, and Marc Serughetti look at improving reliability at the system level and the chip level, in How Digital Twins Are Unlocking The Next Era Of Aerospace And Government Applications.
Rambus’ Emma-Jane Crozier explains why security for these devices is different, and what to do about it, in Securing Accelerator Blades For Datacenter AI/ML Workloads.
Sponsor White Papers
Similar But Different — The Tale Of Transient And Permanent Faults
Automation and services to help guide safety-critical project teams through the entire lifecycle.
Ensuring Data Integrity And Performance Of High-Speed Data Transmission
Addressing complex EM challenges involving complex 5G and 112G communication networks and ADAS, HPC, ML, and IoT applications.
Capture Effective Hardware Security Requirements In 3 Steps
A systematic process for developing security requirements, from verifying throughout the design to sign-off.
Reducing Security Vulnerabilities In Connected Cars And Factories With Secured Flash
Secured flash devices must offer solutions that protect critical system data from attacks.
First Line Of Defense: Developer Security Tools In The IDE
Bringing security detection and remediation into the integrated development environment so developers see security vulnerabilities as they work.
Rambus RT-640 Road To ISO26262 Certification
How Rambus achieved the ISO26262 ASIL-B certification of the RT-640 hardware security module.
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