Special Report
FinFET Scaling Reaches Thermal Limit
Advancing to the next process nodes will not produce the same performance improvements as in the past.
Top Stories
Power-Centric Chip Architectures
New approaches can lower power, but many are harder to design.
Keeping The Whole Package Cool
Thermal issues become more complex in advanced packaging.
IP Business Models In Flux
With so many unknowns about future designs, it’s hard to figure out where to place bets.
Video
Tech Talk: Power Signoff
A look at the impact of margin in advanced designs and how to ensure there is sufficient coverage.
Blogs
Editor In Chief Ed Sperling finds experimentation is replacing a neatly ordered future, which isn’t all bad, in No More Straight Lines.
Executive Editor Ann Steffora Mutschler observes that when it comes to statistical calibration, what you do with the data can make a difference, in It’s All About The Data.
Synopsys’ Srikanth Jadcherla examines the use of island ordering to counter an explosion of power states, in Is Low Power Coverage Achievable?
Sonics’ Drew Wingard digs into power management from the architectural design level, in Three Common SoC Power Management Myths.
Mentor Graphics’ Mohit Kumar looks at why deep sequential analysis is so valuable, in Save Power And Area By Eliminating Redundant Resets.
ARM’s David Maidment digs into new design approaches when implementing Cat-M and NB-IoT, in Evolving LTE Brings New Era Of Connectivity To IoT.
