Low Power-High Performance

Top Stories

Designing Resilient Electronics

Eliminating downtime in safety- and mission-critical applications.

HBM Issues In AI Systems

Speeding up memory reveals new challenges, especially when memory is part of the package.

Power Management Becomes Top Issue Everywhere

Concerns about power are impacting everything, and AI is complicating it.

Power Challenges In ML Processors

Machine learning engines present some new power challenges that could trip up the unwary. Some of the issues were known once, but since have been f...

The Long Road To Quantum Computing

Focus shifting from novel techniques and materials to what the chip industry knows best – silicon.

Wrestling With Variation In Advanced Node Designs

Margin is no longer effective, so now the problem has to be solved on the design side.

Reducing Power At RTL

Dependencies, different methodologies, and a growing number of variables make this an increasingly challenging and complex problem.

Brighter Future For Photonics

Will progress in 3D stacking translate into increased opportunities for photonics chips? Progress still has to be made in several areas.

The MCU Dilemma

Microcontroller vendors are breaking out of the box that has constrained them for years. Will new memory types and RISC-V enable the next round of ...

Non-Volatile Memory Tradeoffs Intensify

Why NVM is becoming so application-specific and what the different options are.

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Round Tables

Addressing Pain Points In Chip Design

Partitioning, debug and first-pass working silicon lead the list of problems that need to be solved.

Why DRAM Won’t Go Away

New materials, new architectures and higher density have limited what can be done with DRAM, but it's still king (Experts At The Table Part 3)

DRAM Tradeoffs: Speed Vs. Energy

Experts at the Table: Which type of DRAM is best for different applications, and why performance and power can vary so much.

HBM2 Vs. GDDR6: Tradeoffs In DRAM

Experts at the Table, part 1: Choices vary depending upon application, cost and the need for capacity and bandwidth, but the number of options is c...

Planning For 5G And The Edge

Experts at the Table, part 2: Understanding 5G's benefits, limitations and design challenges.

More Roundtables »


Visualizing Differences In Analog Design

Why analog engineers require visuals, why digital engineers do not.

High-Performance Memory For AI And HPC

Processing more data much more quickly.

Reliability In Automotive Chips

Understanding the mission profile and how that changes over time.

Where Timing And Voltage Intersect

Factors that limit whether a design can perform to spec.

Thermal Guardbanding

How more accurate measurements can impact efficiency and performance.

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Latest Blogs

Editor's Note

How Much Power Will AI Chips Use?

So far there is little data to show what works best and why.
March 12, 2020
Spotlight On Reliability

Packaging And Package Design For AI At The Edge

Why system architects need to be able to compare different design variants at...
A Bit About Memory

HBM2E Memory: A Perfect Fit For AI/ML Training

The ability of HBM to achieve tremendous memory bandwidth in a small footprin...
Everything Low Power

Demystifying Mirror Types

How package layout mirroring works differently for some components and why it...
IP And LP In SoCs

Die-to-Die Connectivity With High-Speed SerDes PHY IP

Multi-chip module packaging for HPC, Ethernet, and AI SoCs demands low latenc...
Let's Talk PVT Monitoring

Avoiding Gloom With Better Knowledge

As manufacturing variability increases at advanced nodes, monitoring what's h...
Best Of Both: LP & HP

Aging Analysis Standard Solidifies Through Collaborative ...

How the Open Model Interface enables a simulator-agnostic way to perform the ...
The Disruptive Edge

Choosing The Right Level Of Programmability

While some designs need flexibility, many may get more benefit from custom so...
At The Core

5G Will Enable Cloud Gaming

The ability to render a game in the cloud and deliver the visual output to an...
Power Source

Cloud And HPC Simulation Myths

Addressing misconceptions about the complexity, cost, and security of using s...
Power Awareness

Aging Analysis Hits Mainstream

Increasingly, the ability to address transistor aging is showing up in EDA to...
November 8, 2018

Knowledge Centers
Entities, people and technologies explored

  Trending Articles

Improving EUV Process Efficiency

New materials and equipment could have a significant impact on both cost and speed.

Memory Issues For AI Edge Chips

In-memory computing becomes critical, but which memory and at what process node?

Why It’s So Hard To Create New Processors

Many companies are interested in developing their own processors, following the success of RISC-V, but verification is a daunting challenge.

The Ins And Outs Of Silicon Carbide

Cree’s CTO explains the different characteristics of silicon and SiC and where each one works best.

Scaling Up Compute-In-Memory Accelerators

New research points to progress and problems in a post-von Neumann world.