Packaging, Test & Materials

Top Stories

Choosing The Right Interconnect

Packaging options increasing as chipmakers vie for higher performance, lower power and faster time to market.

Embedded Die Packaging Emerges

Why this technology approach is suddenly getting attention, and what hurdles still remain.

Wireless Test Faces New Challenges

The advent of 5G and other emerging wireless technologies make test more difficult. Over-the-air testing is one possible solution.

Toward High-End Fan-Outs

Denser interconnects, stacked die could rival 2.5D approaches.

Finding Faulty Auto Chips

The road to zero defects requires some new tactics.

Looking At Test Differently

How test strategies are changing to adapt to smaller batches of more complex designs and new packaging technologies.

Fan-Out Wars Begin

The number of low-density packaging options is increasing as the popularity of advanced packaging grows.

Cheaper Packaging Options Ahead

Low-cost alternatives to interposers could have a big impact on chip design.

Testing Analog Chips

Increasing numbers of analog components could help perk up this market after years of steady but sleepy growth.

Packaging Challenges For 2018

Shortages, pricing pressures, rising investments and more packaging options add up to an interesting year for OSATs.

More Top Stories »



Round Tables

2.5D Surprises And Alternatives

First of two parts: Cost and supply chain issues remain as advanced packaging begins to ramp.

Stacked Die Changes

Experts at the table, part 3: How mature are high-speed interconnects and what hurdles remain for widespread adoption.

Stacked Die Changes

Experts at the table, part 2: Different coefficients of thermal expansion cause warpage problems; known good die issues.

Stacked Die Changes

Experts at the table, part 1: There are new and better options for packaging chips together as the semiconductor industry begins to figure out what...

More Roundtables »



Multimedia

Tech Talk: System In Package

Why advanced packaging is so important for autonomous driving and the semiconductor industry.

Tech Talk: 2.5D Issues

How ready is this packaging approach and what problems remain?

Tech Talk: 14nm And Stacked Die

Why the 14nm node will be long lived, and how it will be used in 2.5D and 3D-IC packages.

Tech Talk: 2.5D Stacked Die

What's the real motivation behind stacking die?

More Multimedia »



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Latest Blogs

Editor's Note

The Race To Mass Customization

Why the next phase of advanced packaging is so important.
April 9, 2018
All About Test

Xcerra’s Stock Buoyed by Busted Deal

Investors are enthusiastic for its shares.
Material Science

The Problem With Spin-On Carbon Materials

How to solve the breakdown of polymers at high temperatures.
Accelerating Design & Test

5G New Radio Signal Design

What’s in the new standard, how it differs from 4G LTE, and why it matters.
March 5, 2018
The Human Machine Interface

Better Living Through Microelectronics

From energy harvesting to prosthetics, semiconductor technologies have the po...
The Connected Perspective

2017: A Good Year for ATE

Test equipment sales were up, and so were the share prices of ATE stocks.
January 8, 2018
Inside Big Data

Is It Safe To Assume That All “Passed” Die Ar...

Detecting tricky test escapes and preventing defective parts from getting int...
October 9, 2017
EDA For Manufacturability

Crossing The Chasm: Uniting SoC And Package Verification

EDA companies, OSATs, and foundries must collaborate to ensure wafer-level pa...
March 6, 2017

Knowledge Centers
Entities, people and technologies explored


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So far there are no tools and no clear methodology to eliminating bugs. That would require understanding what an AI bug actually is.

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