DTCO/STCO Create Path For Faster Yield Ramps
A holistic approach can improve reliability and reduce defects, but it has to start early in the design cycle.
AI/ML Challenges In Test and Metrology
New tools are changing the game, but it will take time and collaboration for them to achieve their full potential.
Strategies For Detecting Sources Of Silent Data Corruption
Manufacturing screening needs improvement, but that won't solve all problems. SDCs will require tools and methodologies that are much broader and d...
Adaptive Test Ramps For Data Intelligence Era
Timely changes to test programs will speed throughput, but one big hurdle remains.
Hidden Costs And Tradeoffs In IC Quality
Why balancing the costs of semiconductor test and reliability is increasingly difficult.
Inspection, Metrology Issues In Advanced Packages
How to ensure that chips and chiplets will work as expected inside a package.
Glass Substrates Gain Foothold In Advanced Packages
Problems need to be solved before this technology goes mainstream, but the benefits are significant.
Pressure Builds On Failure Analysis Labs
Goal is to find the causes of failures faster and much earlier — preferably before first silicon.
Plugging Gaps In The IC Supply Chain
Consistent unique identifiers, from die to final end-system, open the door for new analytic workflows that can improve reliability and traceability.
Testing ICs Faster, Sooner, And Better
Why test cells could become the critical information hub of the fab.
Inspection, Metrology Issues In Advanced Packages
How to ensure that chips and chiplets will work as expected inside a package.
Applying ML In Failure Analysis
When and where machine learning is best used, and how to choose the right model.
Isolating Critical Data In Failure Analysis
Why a shortage of data often impedes root-cause analysis.
Streamlining Failure Analysis Of Chips
Identifying nm-sized defects in a substrate, mixing FA with metrology, and the role of ML in production.
Data, System Reliability, and Privacy
Sharing data from design to the field can improve reliability, but it raises other questions for which there are no clear answers today.
Cost And Quality Of Chiplets
The growing need for adaptive test in heterogeneous designs.
Yield Tracking In RDL
How to identify defects in panel-level packages, and why that's needed for generative AI in data centers.
Reducing Power In Data Centers
New approaches to improving utilization while reducing guard-banding.
Using Deep Data For Improved Reliability Testing
Using internal data to determine failure rates and how close an individual device is to failure.
Total Overlay With Multiple RDLs
Unexpected problems that can develop throughout the whole RDL stack.