Technical Paper Home

Packaging

• Side-Channel Risks Across 2.5D/3D Integration and Chiplet-Based Systems (Grenoble INP – UGA et al.)

  Published on May 25, 2026

• Energy-Efficient Liquid Cooling for Advanced Semiconductor Packaging (KAIST)

  Published on April 29, 2026

• Rethinking ESD Protection for System-On-Integrated Chiplets (UC Riverside)

  Published on April 28, 2026

• Alumina Nanowires Improve Thermal Management in Advanced Packaging (Georgia Tech et al.)

  Published on April 28, 2026

• Mapping and Routing Fault-Tolerant Quantum Circuits Onto Chiplet Architectures (TU Munich)

  Published on April 28, 2026

• Photonic Packaging Resistant to Extreme Environments (NIST, Johns Hopkins, U. Of Maryland)

  Published on April 11, 2026

• Replay‑based Validation as a Scalable Methodology for Chiplet‑based Systems (Intel, Synopsys)

  Published on March 18, 2026

• Pathfinding Method That Models ECC Overhead for Chiplet Interconnects (UCLA)

  Published on March 16, 2026

• RPU: A Chiplet-Based Architecture To Address The Challenges of the Modern Memory Wall (Harvard University)

  Published on March 4, 2026

• Router-in-a-Package Design Combining HBM4, Chiplets and In-Package Optics (Technion, Berkeley, UCSD)

  Published on February 18, 2026
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