A new technical paper, “Highly energy-efficient manifold microchannel for cooling electronics with a coefficient of performance over 100,000,” was published by researchers at KAIST.
The study presents a CMOS-compatible manifold microchannel cooler that removes over 2,000 W/cm² using single-phase water at only 8 kPa pressure drop, achieving a record COP of 106,000—a significant improvement over prior state-of-the-art liquid-cooling technologies for advanced semiconductor packaging.
The results point to a scalable thermal-management pathway for next-generation heterogeneous integration, 3D packaging, and AI/HPC chips, where thermal density is becoming a primary packaging bottleneck.
Find the technical paper here. Published April 2026. Preprint download is available here.
Lee, Young Jin, ChulHyun Hwang, Hansol Lee, Ikjin Lee, and Sung Jin Kim. “Highly energy-efficient manifold microchannel for cooling electronics with a coefficient of performance over 100,000.” Energy Conversion and Management 358 (2026): 121422.
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