Power Is Limiting Machine Learning Deployments

By Brian Bailey - 16 Jul, 2019 - Comments: 2

The total amount of power consumed for machine learning tasks is staggering. Until a few years ago we did not have computers powerful enough to run many of the algorithms, but the repurposing of the GPU gave the industry the horsepower that it needed. The problem is that the GPU is not well suited to the task, and most of the power consumed is waste. While machine learning has provided many ... » read more

GDDR Accelerates Artificial Intelligence And Machine Learning

By Frank Ferro - 16 Jul, 2019 - Comments: 0

The origins of modern graphics double data rate (GDDR) memory can be traced back to GDDR3 SDRAM. Designed by ATI Technologies, GDDR3 made its first appearance in NVidia’s GeForce FX 5700 Ultra card which debuted in 2004. Offering reduced latency and high bandwidth for GPUs, GDDR3 was followed by GDDR4, GDDR5, GDDR5X and the latest generation of GDDR memory, GDDR6. GDDR6 SGRAM supports a ma... » read more

Low-Power Design Becomes Even More Complex

By Ann Steffora Mutschler - 16 Jul, 2019 - Comments: 0

Throughout the SoC design flow, there has been a tremendous amount of research done to ease the pain of managing a long list of power-related issues. And while headway has been made, the addition of new application areas such as AI/ML/DL, automotive and IoT has raised as many new problems as have been solved. The challenges are particularly acute at leading-edge nodes where devices are power... » read more

Will In-Memory Processing Work?

By Brian Bailey - 16 Jul, 2019 - Comments: 1

The cost associated with moving data in and out of memory is becoming prohibitive, both in terms of performance and power, and it is being made worse by the data locality in algorithms, which limits the effectiveness of cache. The result is the first serious assault on the von Neumann architecture, which for a computer was simple, scalable and modular. It separated the notion of a computatio... » read more

How To Improve ML Power/Performance

By Ed Sperling - 12 Jul, 2019 - Comments: 0

Raymond Nijssen, vice president and chief technologist at Achronix, talks about the shift from brute-force performance to more power efficiency in machine learning processing, the new focus on enough memory bandwidth to keep MAC functions busy, and how dynamic range, precision and locality can be modified to improve speed and reduce power. » read more

System Bits: July 10

By Jeff Dorsch - 10 Jul, 2019 - Comments: 0

Light waves run on silicon-based chips Researchers at the University of Sydney’s Nano Institute and Singapore University of Technology and Design collaborated on manipulating light waves on silicon-based microchips to keep coherent data as it travels thousands of miles on fiber-optic cables. Such waves—whether a tsunami or a photonic packet of information—are known as solitons. The... » read more

HW/SW Design At The Intelligent Edge

By Ann Steffora Mutschler - 08 Jul, 2019 - Comments: 0

Adding intelligence to the edge is a lot more difficult than it might first appear, because it requires an understanding of what gets processed where based on assumptions about what the edge actually will look like over time. What exactly falls under the heading of Intelligent Edge varies from one person to the next, but all agree it goes well beyond yesterday’s simple sensor-based IoT dev... » read more

Security’s Very Strange Path To Success

By Ed Sperling - 02 Jul, 2019 - Comments: 0

Security at the chip level appears to be heading toward a more promising future. The reason is simple—more people are willing to pay for security than in the past. For the most part, security is like insurance. You don't know it's working until something goes wrong, and you don't necessarily even know right away if there has been a breach. Sometimes it takes years to show up, because it ca... » read more

TOPS, Memory, Throughput And Inference Efficiency

By Geoff Tate - 02 Jul, 2019 - Comments: 0

Dozens of companies have or are developing IP and chips for Neural Network Inference. Almost every AI company gives TOPS but little other information. What is TOPS? It means Trillions or Tera Operations per Second. It is primarily a measure of the maximum achievable throughput but not a measure of actual throughput. Most operations are MACs (multiply/accumulates), so TOPS = (number of MAC... » read more

Machine Learning Inferencing Moves To Mobile Devices

By Kevin Fogarty - 02 Jul, 2019 - Comments: 0

It may sound retro for a developer with access to hyperscale data centers to discuss apps that can be measured in kilobytes, but the emphasis increasingly is on small, highly capable devices. In fact, Google staff research engineer Pete Warden points to a new app that uses less than 100 kilobytes for RAM and storage, creates an inference model smaller than 20KB, and which is capable of proce... » read more

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tag: machine learning

Power Is Limiting Machine Learning Deployments

GDDR Accelerates Artificial Intelligence And Machine Learning

Low-Power Design Becomes Even More Complex

Will In-Memory Processing Work?

How To Improve ML Power/Performance

System Bits: July 10

HW/SW Design At The Intelligent Edge

Security’s Very Strange Path To Success

TOPS, Memory, Throughput And Inference Efficiency

Machine Learning Inferencing Moves To Mobile Devices

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