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Graphene-based PUFs that are reconfigurable and resilient to ML attacks


Researchers at Pennsylvania State University propose using graphene to create physically unclonable functions (PUFs) that are energy efficient, scalable, and secure against AI attacks. Abstract "Graphene has a range of properties that makes it suitable for building devices for the Internet of Things. However, the deployment of such devices will also likely require the development of s... » read more

New Power, Performance Options At The Edge


Increasing compute intelligence at the edge is forcing chip architects to rethink how computing gets partitioned and prioritized, and what kinds of processing elements and memory configurations work best for a particular application. Sending raw data to the cloud for processing is both time- and resource-intensive, and it's often unnecessary because most of the data collected by a growing nu... » read more

Safe And Robust Machine Learning


Deploying machine learning in the real world is a lot different than developing and testing it in a lab. Quenton Hall, AI systems architect at Xilinx, examines security implications on both the inferencing and training side, the potential for disruptions to accuracy, and how accessible these models and algorithms will be when they are used at the edge and in the cloud. This involves everything ... » read more

IC Data Hot Potato: Who Owns And Manages It?


Modern inspection, metrology, and test equipment produces a flood of data during the manufacturing and testing of semiconductors. Now the question is what to do with all of that data. Image resolutions in inspection and metrology have been improving for some time to deal with increased density and smaller features, creating a downstream effect that has largely gone unmanaged. Higher resoluti... » read more

Debug: The Schedule Killer


Debug often has been labeled the curse of management and schedules. It is considered unpredictable and often can happen close to the end of the development cycle, or even after – leading to frantic attempts at work-arounds. And the problem is growing. "Historically, about 40% of time is spent in debug, and that aspect is becoming more complex," says Vijay Chobisa, director of product manag... » read more

Manufacturing Bits: June 29


Speeding up ALD with AI The U.S. Department of Energy’s (DOE) Argonne National Laboratory has developed various ways to make atomic layer deposition (ALD) more efficient by using artificial intelligence (AI). ALD is a deposition technique that deposits materials one layer at a time on chips. For years, ALD has been used for the production of DRAMs, logic devices and other products. In ... » read more

Architectural Considerations For AI


Custom chips, labeled as artificial intelligence (AI) or machine learning (ML), are appearing on a weekly basis, each claiming to be 10X faster than existing devices or consume 1/10 the power. Whether that is enough to dethrone existing architectures, such as GPUs and FPGAs, or whether they will survive alongside those architectures isn't clear yet. The problem, or the opportunity, is that t... » read more

CEO Outlook: More Data, More Integration, Same Deadlines


Experts at the Table: Semiconductor Engineering sat down to discuss the future of chip design and EDA tools with Lip-Bu Tan, CEO of Cadence; Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of Siemens IC EDA; John Kibarian, CEO of PDF Solutions; Prakash Narain, president and CEO of Real Intent; Dean Drako, president and CEO of IC Manage; and Babak Taheri, CEO of Silvaco. What ... » read more

Shifting Toward Data-Driven Chip Architectures


An explosion in data is forcing chipmakers to rethink where to process data, which are the best types of processors and memories for different types of data, and how to structure, partition and prioritize the movement of raw and processed data. New chips from systems companies such as Google, Facebook, Alibaba, and IBM all incorporate this approach. So do those developed by vendors like Appl... » read more

Thermal Floorplanning For Chips


Heat management is becoming crucial to an increasing number of chips, and it's one of a growing number of interconnected factors that must be considered throughout the entire development flow. At the same time, design requirements are exacerbating thermal problems. Those designs either have to increase margins or become more intelligent about the way heat is generated, distributed, and dissi... » read more

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