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Improving PPA With AI


AI/ML/DL is starting to show up in EDA tools for a variety of steps in the semiconductor design flow, many of them aimed at improving performance, reducing power, and speeding time to market by catching errors that humans might overlook. It's unlikely that complex SoCs, or heterogeneous integration in advanced packages, ever will be perfect at first silicon. Still, the number of common error... » read more

NVMe-oF: Simple, Invisible Fabric For Distributed Storage Networks


In today’s fast paced world, we need seamless access to huge chunks of data and new-world technologies, such as artificial intelligence (AI), machine learning (ML), cloud computing, and real-time data analytics. AI researchers are deriving applications such as cyber security analysis and intelligent virtual assistants (IVA) where the computer needs to process an intense amount of data. Theref... » read more

Novel H2H mapping algorithm with both computation and communication awareness


New research paper "H2H: Heterogeneous Model to Heterogeneous System Mapping with Computation and Communication Awareness" from University of Pittsburgh, Georgia Tech. Abstract: "The complex nature of real-world problems calls for heterogeneity in both machine learning (ML) models and hardware systems. The heterogeneity in ML models comes from multi-sensor perceiving and multi-task lear... » read more

AI-Based Method to Prune the Design Space of Heterogeneous NoCs


Abstract "Often suffering from under-optimization, Networks-on-Chip (NoCs) heavily impact the efficiency of domain-specific Systems-on-Chip. To cope with this issue, heterogeneous NoCs are promising alternatives. Nevertheless, the design of optimized NoCs satisfying multiple performance objectives is extremely challenging and requires significant expertise. Prior works failed to combine many... » read more

Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design


Abstract "With the improvement of VLSI technology, on-chip power grid design is becoming more challenging than before. In this design phase of VLSI CAD, power grids are generated in order to make power and ground connections to transistors or logic blocks. However, due to the scaling of supply voltage and increase in the number of transistors per unit area of the chip, power grid design has ... » read more

Architecting Faster Computers


To create faster computers, the industry must take a major step back and re-examine choices that were made half a century ago. One of the most likely approaches involves dropping demands for determinism, and this is being attempted in several different forms. Since the establishment of the von Neumann architecture for computers, small, incremental improvements have been made to architectures... » read more

Finding And Applying Domain Expertise In IC Analytics


Behind PowerPoint slides depicting the data inputs and outputs of a data analytics platform belies the complexity, effort, and expertise that improve fab yield. With the tsunami of data collected for semiconductor devices, fabs need engineers with domain expertise to effectively manage the data and to correctly learn from the data. Naively analyzing a data set can lead to an uninteresting an... » read more

Moving Intelligence To The Edge


The buildout of the edge is driving a slew of new challenges and opportunities across the chip industry. Sailesh Chittipeddi, executive vice president at Renesas Electronics America, talks about the shift toward more AI-centric workloads rather than CPU-centric, why embedded computing is becoming the foundation of all intelligences, and the importance of software, security, and user experience ... » read more

Exploring far-from-equilibrium ultrafast polarization control in ferroelectric oxides with excited-state neural network quantum molecular dynamics


New academic paper out of USC Viterbi School of Engineering: Abstract "Ferroelectric materials exhibit a rich range of complex polar topologies, but their study under far-from-equilibrium optical excitation has been largely unexplored because of the difficulty in modeling the multiple spatiotemporal scales involved quantum-mechanically. To study optical excitation at spatiotemporal scales w... » read more

An adaptive synaptic array using Fowler–Nordheim dynamic analog memory


Abstract "In this paper we present an adaptive synaptic array that can be used to improve the energy-efficiency of training machine learning (ML) systems. The synaptic array comprises of an ensemble of analog memory elements, each of which is a micro-scale dynamical system in its own right, storing information in its temporal state trajectory. The state trajectories are then modulated by a sys... » read more

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