AI's impact on EDA; floor-planning for chiplets; disaggregation and system-level design; LLMs capture knowledge; droop and SDC; automated verification for 2D/3D; RTL design efficiency; IP catalogs; debugging tools; interconnects for ADAS.
Heat issues in advanced ICs; power optimization; data center thermal management; 224Gbps PHY for next-gen HPC; rigid-flex PCB design; comparing sensors.
Power challenges in HPC testing; digital twin progress, hurdles in IC manufacturing; X-ray inspection goes mainstream; adaptable test; Si model calibration; automotive test; monitoring/testing multi-die designs; testing power amplifiers; ML for semiconductor yield; real-time safety monitoring for automotive.
Security focus widens to HW, SW, ecosystems; thermal challenges in auto, embedded; securing data in heterogeneous designs; digital twin challenges; power stages; automotive chiplets; low-power benefits of BLE and NFC; HW security; securing semiconductor manufacturing; automotive IP verification.
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