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October 2020


Interactive (Live Simulation) Debug Techniques for UVM, SystemVerilog and RTL using Visualizer Advanced Debug GUI

October 27 @ 8:00 am9:00 am PDT

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50-250GHz Power Amplifier MMICs Design Using a 250nm InP HBT Technology

October 27 @ 9:00 am10:00 am PDT

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Embedded Analytics– a critical enabler for Silicon Lifecycle Solutions

October 27 @ 9:00 am10:00 am PDT

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Connecting the Dots: Linking Electronic Materials Quality to On-Wafer Performance through Metrology

October 28 @ 10:00 am11:00 am PDT

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New Ansys Electronics Desktop Capabilities for Electronics Design, Validation and Sign Off

October 28 @ 3:00 pm4:00 pm CET

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Functional Safety: ISO 26262 Fault Campaign Management

October 29 @ 8:00 am8:30 am PDT

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Low Power Verification – Challenges, Methodologies and Flows

October 29 @ 10:00 am11:00 am PDT

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November 2020


Porting Vivado HLS Designs to Catapult HLS Platform

November 3 @ 10:00 am11:00 am PST

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Experiencing a Performance Gap? Boost the P in your PPA using H-Trees with MSCTS in Fusion Compiler

November 3 @ 10:00 am11:00 am PST

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Mentor’s next step towards Cockpit Compute Consolidation (8am PST and 10am Europe/Berlin)

November 4 @ 8:00 am9:00 am PST

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Does your SoC verification need a shot in the Arm? (multiple times on November 4th)

November 4 @ 8:00 am9:00 am PST

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Attracting and Developing a Skilled Workforce for the U.S. Semiconductor Industry (SIA)

November 5 @ 10:00 am11:00 am PST

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Automated Defect Detection, Mapping and Characterization with the Zeta 3D Optical Profiler

November 10 @ 9:00 am10:00 am PST

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Reducing the Risk of Using Linux in a Medical Device (7am PST & 11am PST)

November 12 @ 11:00 am12:00 pm PST

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Chemical vapor deposition simulation

November 17 @ 10:00 am11:00 am PST

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Recipe Development on the New F54-XY-200 (spectroscopic thin-film mapping systems)

November 17 @ 11:00 am12:00 pm PST

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December 2020


Decadal Plan for Semiconductors: Setting the 2030 Goals (SIA)

December 2 @ 8:00 am9:30 am PST

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Printed Circuit Board Trace Modeling

December 10 @ 8:00 am9:00 am PST

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