Special Reports

Backside Power Delivery Gears Up For 2nm Devices

By: Laura Peters

But this novel approach to optimizing logic performance depends on advancing lithography, etching, polishing, and bonding processes.
SRAM Scaling Issues, And What Comes Next

By: Karen Heyman

While it will remain a workhorse memory, using SRAM at advanced nodes requires new approaches.
Chip Ecosystem Apprenticeships Help Close The Talent Gap

By: Liz Allan

Registered apprenticeships, community colleges, and in-house training can help build a broad workforce pipeline for technician roles and more advanced...

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Top Stories

Thinking Big: From Chips To Systems

Multi-die systems require new tools, technologies, and some very different approaches t...

UCIe Goes Back To The Drawing Board

The open chiplet interconnect protocol faces some formidable challenges, but progress c...

Building CFETs With Monolithic And Sequential 3D

Area benefits are significant for future transistor shrinks, but manufacturing challeng...

Tackling Variability With AI-based Process Control

How AI is being used in the fab today, and what's coming in the future.

Broad Impact From Accelerating Tech Cycles

How disruptive new technologies affect the infrastructure that will leverage them.

Why Chiplets Are So Critical In Automotive

Achieving chiplet interoperability is a competitive necessity, but it will require clea...

Latency, Interconnects, And Poker

Where this year's Phil Kaufman Award winner placed his bets, and how he won.

AI Tradeoffs At The Edge

The best ways to optimize AI efficiency today, and other options under development.

Re-architecting Hardware For Energy

The industry is at a turning point. Power has been a second-class citizen when it comes...

Memory’s Future Hinges On Reliability

Robust implementations are a major issue, particularly as memory density increases.

Adaptive Test Ramps For Data Intelligence Era

Timely changes to test programs will speed throughput, but one big hurdle remains.

Hidden Costs And Tradeoffs In IC Quality

Why balancing the costs of semiconductor test and reliability is increasingly difficult.

more top stories »

Latest News

Chip Industry Week In Review

Intel's foundry push; GF's big subsidy; Arm's Neoverse systems; ASE's new facilities; imec's ADC architecture and UWB chip; automotive chiplets; UCIe's challenges...

Intel, And Others, Inside

Why the company's foundry push is starting to win converts.

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Research

Research Bits: Feb. 27

Neuromorphic computing: Phonon-magnon reservoir, eye-like meta...

Research Bits: Feb. 19

DNA assembly of 3D nanomaterials; Mott insulator transistor; f...

Chip Industry Technical Paper Roundup: Feb. 19

Pre-silicon emulation of RISC-V designs; HW security bugs in O...

more research »



Startup Corner

Startup Funding: January 2024

Chiplet packaging, AI, and quantum draw investment; 20 startup...

Startup Funding: December 2023

Funding boosts photonics for AI, flexible chips; $1.3 billion ...

more startups »

Knowledge Centers / Entities, people and technologies explored