Systems & Design

Top Stories

Chip Companies Play Bigger Role In Shaping University Cur...

Design and AI companies are using a range of tools to help graduates become productive more quickly. Some are feeding their requirements directly t...

Slow Progress On Generative EDA

The dream may be to have generative AI write RTL, but text is only one of the necessary things AI must understand to help with many design and impl...

How AI Is Transforming System Design

LLMs and machine learning are automating expertise in an aging workforce.

RISC-V’s Software Portability Challenge

A hardware-software contract is needed for software portability, but RISC-V is not yet defined well enough to know what that is.

Chiplets Make Progress Using Interconnects As Glue

Industry learning expands as more SoCs are disaggregated at leading edge, opening door to more third-party chiplets.

HW and SW Architecture Approaches For Running AI Models

Custom hardware tailored to specific models can unlock performance gains and energy savings that generic hardware cannot achieve, but there are tra...

RISC-V Conformance

Finding out if a processor implementation matches the specification is important, but conformance testing is currently not available.

Startup Funding: Q3 2024

New startups emerge from stealth; 75 companies raise $2 billion.

Barriers To Chiplet Sockets

Perfection sometimes stands in the way of progress, and there is evidence this may be happening with chiplets. It may be time to slow down and make...

Using AI To Glue Disparate IC Ecosystem Data

Why the chip industry is so focused on large language models for designing and manufacturing chips, and what problems need to be solved to realize ...

More Top Stories »



Round Tables

How AI Is Transforming System Design

LLMs and machine learning are automating expertise in an aging workforce.

RISC-V’s Software Portability Challenge

A hardware-software contract is needed for software portability, but RISC-V is not yet defined well enough to know what that is.

RISC-V Conformance

Finding out if a processor implementation matches the specification is important, but conformance testing is currently not available.

Barriers To Chiplet Sockets

Perfection sometimes stands in the way of progress, and there is evidence this may be happening with chiplets. It may be time to slow down and make...

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken ...

More Roundtables »



Multimedia

The Evolution of HBM

From 2.5D to AI everywhere.

Using Formal For RISC-V Security

Why microarchitectures and custom coding on low-cost chips are a growing source of concern.

Scaling Performance In AI Systems

Tackling bottlenecks and improving time to market in complex designs.

Globally Asynchronous, Locally Synchronous Clocks

Improving performance through better partitioning of data movement in complex designs.

Working With Chiplets

What comes after HBM, and why that matters for future designs.

More Multimedia »



See All Posts in System-Level Design »

Latest Blogs

The Next Wave

Redefining XPU Memory For AI Data Centers Through Custom ...

The key elements and considerations involved in implementing a 2.5D HBM design.
December 9, 2024
NoC NoC

Scaling AI Chip Design With NoC Soft Tiling

Repetition of modular units inside a network-on-chip facilitates scalability ...
November 26, 2024
A System Perspective

How To Speed Up LVS Verification

Shifting left for faster design closure.
November 26, 2024
Looking Past The Horizon

Successful Design Of Power Management Chips

PMICs are seeing an increasing level of integration and miniaturization.
November 26, 2024
First By Design

The Latest Wireless Industry Use Cases

While the long-term future of mobile connectivity is bright, there are still ...
November 26, 2024
Intelligent System Design

Outlook 2025: Embracing Chiplets

The shift from traditional monolithic SoC designs to chiplet-based architectu...
November 26, 2024
Memory/IO Wall Solutions

UMI: Extending Chiplet Interconnect Standards To Deal Wit...

Consistently moving data at speeds required for AI systems.
October 14, 2024
Making Formal Normal

Corner-Case Bug Hunting for RISC-V

Nice to have, or an imperative?
September 30, 2024
The Chiplet Connection

Enabling Innovative Multi-Vendor Chiplet-Based Designs

What makes chiplets so attractive, and why they are essential for future desi...
September 26, 2024
Clock Talk

Droop And Silent Data Corruption

Advanced silicon lifecycle analytics and on-die telemetry are needed to count...
July 25, 2024

Knowledge Centers
Entities, people and technologies explored


  Trending Articles

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

One Chip Vs. Many Chiplets

Challenges and options vary widely depending on markets, workloads, and economics.

FOPLP Gains Traction in Advanced Semiconductor Packaging

Panel-level packaging offers scalability and cost efficiency, but meeting advanced node process targets remains a formidable challenge.

HBM Options Increase As AI Demand Soars

But manufacturing reliable 3D DRAM stacks with good yield is complex and costly.