System-Level Design

Top Stories

Which Verification Engine?

Experts at the Table, part 2: The real value of multiple verification engines; cloud-based verification gains some footing, particularly with inter...

Big Challenges, Changes For Debug

Push to 7nm and beyond, as well as safety-critical markets, raises the stakes and hurdles for finding design issues. New approaches may be necessar...

Prototyping Partitioning Problems

Gap widens between increasing design complexity and FPGA capabilities, making this a lot harder than it used to be.

One-On-One: Mike Muller

Arm's CTO sounds off on machine learning, the new starting point for designs, new markets that are opening up, and what became of dark silicon.

Could Liquid IP Lead To Better Chips?

Experts at the Table, part 1: High-level synthesis has been shown to produce better results, so when will IP start being shipped as abstract blocks?

Move Data Or Process In Place?

Second of two parts: Costs associated with moving data escalate when we move from chips to systems. Additional social and technical factors drive d...

Which Verification Engine?

Experts at the Table, part 1: No single tool does everything, but do all verification tools have to come from the same vendor?

How To Handle Concurrency

System complexity is skyrocketing, but tool support to handle concurrency and synchronization of heterogeneous systems remains limited.

Evolution Of The MCU

As selling prices plunge, microcontroller companies are looking for new ways to achieve economies of scale.

Move Data Or Process In Place?

Part 1: Moving data is expensive, but decisions about when and how to move data are very context-dependent. System and chip architectures are headi...

More Top Stories »



Round Tables

Which Verification Engine?

Experts at the Table, part 2: The real value of multiple verification engines; cloud-based verification gains some footing, particularly with inter...

Could Liquid IP Lead To Better Chips?

Experts at the Table, part 1: High-level synthesis has been shown to produce better results, so when will IP start being shipped as abstract blocks?

Which Verification Engine?

Experts at the Table, part 1: No single tool does everything, but do all verification tools have to come from the same vendor?

Integrated Photonics

Experts at the Table, part 3: What is the role of EDA in building photonics systems, is a viable IP market developing and how are photonics systems...

Integrated Photonics

Experts at the Table, part 2: What can be done to reduce costs and improve packaging options, and what makes sense in terms of fabrication technolo...

More Roundtables »



Multimedia

Tech Talk: Verification

How verification will change as chips are used in machine learning, medical, 5G, and what impact advanced packaging will have on all of this.

Tech Talk: Pseudo SRAM

A different way to improve performance at the most advanced nodes.

Tech Talk: TCAM

How to save power and reduce area with ternary content addressable memory.

Tech Talk: DO-254

A look at the safety-critical standard for aerospace and what it means for automotive electronics.

Tech Talk: ISO 26262

What's new in the automotive standard and how to design cars that can fail safely.

More Multimedia »



See All Posts in System-Level Design »

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What Were They Thinking

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Against The Grain

UVM Can Kill You. More News At 11

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Editor's Note

More Volatility Ahead

The gyrations in semiconductor stocks are just the beginning. ...
NoC NoC

Heterogeneous Cache Coherence Requires A Common Internal Protocol

How to increase memory bandwidth and reduce latency in next-generation SoCs....
A System Perspective

How To Use CFD To Test And Analyze A Chip Package

Testing every configuration of a package in a lab is practically infeasible, but...
Frankly Speaking

5 Pitfalls That May Kill The IoT

Many things could trip up the predicted explosion of connected devices, but the ...
Design & Verification

Using FPGAs For Emulation

FPGAs are the fastest prototyping platform, and that speed can be utilized in ot...
Just A Formality

The Uncontrolled Rise Of Functional Safety Standards

Efforts are underway to streamline certification and bring the many safety stand...
A View From the Top

Going On A Quest

In prototyping, automation is no substitute for the experience of specialists....
Semi Thoughts

Advanced ASICs: It Takes An Ecosystem

As chip complexity rises, it's no longer possible for one company to do it all....
DAC Exchange

Introducing The 55th DAC General Chair

A top-level view of this year's conference topics....
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Shhhhh... Deadlocks Anonymous In Session

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Embedded Software

Continuous Integration

Streamline software development workflow by implementing virtual platforms with ...
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IoT Security Requirements Ramping

Government and industry groups begin ramping up efforts to limit breaches....
Research: SLD

System Bits: Aug. 8

4D camera; AI sleep monitoring; learning to run....

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