Systems & Design

Top Stories

Why It’s So Hard To Create New Processors

Many companies are interested in developing their own processors, following the success of RISC-V, but verification is a daunting challenge.

Software-Defined Hardware Gains Ground — Again

AI applications are prompting chipmakers to take another look at different options for reconfigurable hardware.

Do You Trust Your IP Supplier?

How secure is the IP that you are integrating into your system? Accellera wants to help with that.

3nm: Blurring Lines Between SoCs, PCBs And Packages

The end of Moore's Law is providing options for shifting what goes where and how it gets designed.

An Increasingly Complicated Relationship With Memory

Pressure is building to change the programming paradigm associated with memory, but so far economic justifications have held back progress.

The Challenges Of Building Inferencing Chips

As the field of AI continues to advance, different approaches to inferencing are being developed. Not all of them will work.

The Cost Of Programmability

How much flexibility should be incorporated in a chip and at what level should it be programmable? Those questions are getting more complicated.

Design For Airborne Electronics

Safety, security and traceability are required in avionics, but more complex chips are exposing gaps in the tool chain and in engineer training.

Divided On System Partitioning

How close can we get to automated system optimization from a software function? The target keeps moving but the tools keep becoming more capable.

Making Sure RISC-V Designs Work As Expected

Open-source growth predictions are impressive, but the verification process can be harder than with commercial ISAs.

More Top Stories »



Round Tables

Portable Stimulus And Digital Twins

Experts at the Table: How Portable Stimulus plays with the digital twin and the drive toward system-level coverage.

RISC-V Markets, Security And Growth Prospects

Experts at the Table: Why RISC-V has garnered so much attention, what still needs to be done, and where it will likely find its greatest success.

Migrating 3D Into The Mainstream

Experts at the Table: The creation of complex, packaged systems affects everything in the design flow and requires a systems approach.

RISC-V Challenges And Opportunities

Who makes money with an open-source ISA, the current state of the RISC-V ecosystem, and what differentiates one vendor from the next.

Extending Portable Stimulus

Experts at the Table: With the initial standard in place, what can we expect in terms of broadening its scope to other domains and applications?

More Roundtables »



Multimedia

Speeding Up Verification Using SystemC

How HLS plus formal can significantly reduce optimization and debug time.

Timing Closure At 7/5nm

Why shifting left in a complex design is critical.

Banking On FPGA Prototyping

Where the biggest savings are in ASIC design.

Fusing Implementation And Verification

Re-using Tcl scripts to reduce cost and potential errors.

Speeding Up FPGA Development

How to debug a large FPGA design.

More Multimedia »



See All Posts in System-Level Design »

Latest Blogs

Editor's Note

What’s Changing, What Isn’t

The overall chip industry remains healthy, with some caveats.
March 26, 2020
What Were They Thinking

Standard Evolution

More end-user involvement means a different approach to standardization.
Looking Past The Horizon

Physical Verification For Photonics Integrated Circuits

While promising for a range of networking applications, photonic ICs present ...
Frankly Speaking

Making Sense Of EDA And Digital Twins

How does the digital twin translate to different industries?
Just A Formality

GapFree Processor Verification

Applying formal verification to thoroughly verify a RISC-V processor design.
A System Perspective

EDA In The Cloud

Leveraging massive amounts of compute resources to reduce time-to-market.
RISC-V Design Verification

Setting Up RISC-V Implementation Verification

How to set up and manage regressions in a lightweight verification tool.
Sharpening Your Edge

Multitasking For Modern GPUs

GPUs are reaching beyond 3D graphics processing to power a range of new markets.
Design & Verification

SoC Co-Emulation Using Zynq Boards

Early and accurate hardware and software co-verification can eliminate severa...
February 27, 2020
Against The Grain

Make-Or-Break Time For Portable Stimulus

We hear a lot from vendors about the new Portable Stimulus Standard, but how ...
October 25, 2018

Knowledge Centers
Entities, people and technologies explored


  Trending Articles

3nm: Blurring Lines Between SoCs, PCBs And Packages

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Improving EUV Process Efficiency

New materials and equipment could have a significant impact on both cost and speed.

Memory Issues For AI Edge Chips

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A New Breed Of Engineer

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