System-Level Design

Top Stories

Pushing AI Into The Mainstream
Why data scrubbing and social issues could limit the speed of adoption and the usefulness of this technology.
Published on January 31st,  2019 by Brian Bailey

Using Memory Differently
Optimizing complex chips requires decisions about overall system architecture, and memory is a key variable.
Published on January 31st,  2019 by Ann Steffora Mutschler

EDA Grabs Bigger Slice Of Chip Market
Manufacturing, packaging and development tools always have earned a fixed percentage of IC revenue, but that could change.
Published on January 31st,  2019 by Brian Bailey

Chip Industry In Rapid Transition
Wally Rhines, Mentor's CEO Emeritus, points to big shifts caused by AI, customization, uncertainty in the global economy and a changing customer base.
Published on January 9th,  2019 by Ed Sperling

Making IP Friendlier
Experts at the Table, part 2: Some IP issues remain unsolved even after 20 years. What the IP industry needs to change for growth.
Published on December 27th,  2018 by Brian Bailey

Using Software Approaches In Hardware Verification
Agile development is gaining traction for developing hardware testbenches, but challenges remain.
Published on December 26th,  2018 by Ann Steffora Mutschler

Fundamental Shifts In 2018
This will go down as a good year for the semiconductor industry, where new markets and innovation were both necessary and rewarded.
Published on December 20th,  2018 by Brian Bailey

Debug Tops Verification Tasks
Time spent in debug on the rise; what needs to be fixed and why.
Published on December 20th,  2018 by Ann Steffora Mutschler

AI Market Ramps Everywhere
The term creates hope for some, fear for others, and confusion for all.
Published on December 20th,  2018 by Brian Bailey

Mitigating Risk Through Verification
Automatic coverage model generation technology continues to advance.
Published on December 5th,  2018 by Ann Steffora Mutschler

More Top Stories »



Round Tables

Making IP Friendlier
Experts at the Table, part 2: Some IP issues remain unsolved even after 20 years. What the IP industry needs to change for growth.
Published on December 27th,  2018 by Brian Bailey

IP Tracking and Management
Experts at the Table, part 1: What are the important elements of an IP tracking and management system for providers and users?
Published on November 29th,  2018 by Brian Bailey

The Impact of Domain Crossing on Safety
Experts at the Table, part 3: What addition problems does this create in application areas, such as automotive? When will we see more automated sol...
Published on October 31st,  2018 by Brian Bailey

So Many Waivers Hiding Issues
Experts at the Table, part 2: Domain crossings can produce thousands of waivers. How does a team put in place a methodology for dealing with them?
Published on October 5th,  2018 by Brian Bailey

Domain Crossing Nightmares
Experts at the Table, part 1: How many domain crossings exist in a typical SoC today and when is the right time to verify their correctness?
Published on September 27th,  2018 by Brian Bailey

More Roundtables »



Multimedia

More Than A Core
A system-level look at integration, security, and new architectures such as RISC-V.
Published on December 20th,  2018 by Ann Steffora Mutschler

Formal Signoff
What makes one assertion better than another?
Published on December 4th,  2018 by Ed Sperling

Heterogeneous Computing Verification
How to verify increasingly complex chips.
Published on November 28th,  2018 by Ed Sperling

Formal Datapath Verification
How to achieve high confidence in data manipulation in a design.
Published on November 28th,  2018 by Ed Sperling

Building AI SoCs
How to develop AI chips when algorithms are changing so quickly.
Published on October 25th,  2018 by Ed Sperling

More Multimedia »



See All Posts in System-Level Design »

Latest Blogs

Editor's Note

Can AI, 5G Chips Be Verified?
Rapid technology changes, uncertain interactions create huge challenges.
January 31, 2019
by Ed Sperling
What Were They Thinking

Should AI Mimic Real Life?
What the human body can teach us about the importance of communications.
by Brian Bailey
Frankly Speaking

Will Top-Down Hardware/Software Co-Design Ever Happen?
How much further left can we shift?
by Frank Schirrmeister
Just A Formality

Connectivity Checking Is A Perfect Fit For Formal Verific...
Formal apps can target specific verification problems at a full-chip level, e...
by Tom Anderson
Looking Past The Horizon

MISing In Signoff
An often-overlooked cause of hold violations no longer can be ignored.
by Jim McCanny
A System Perspective

Verifying AI Designs Thoroughly And Quickly
Why determinism, scalability, and virtualization are all key to AI verification.
by Jean-Marie Brunet
Semi Thoughts

High-Speed Communication Takes A Village
A chip may work, but it's only successful if it performs in the context of th...
by Mike Gianfagna
Intelligent Analytics

Beyond The RISC-V ISA
Designing an SoC is no longer just about the core.
December 20, 2018
by Gajinder Panesar
Design & Verification

Deep Learning Hardware: FPGA vs. GPU
While GPUs are well-positioned in machine learning, data type flexibility and...
by Farhad Fallahlalehzari
Against The Grain

Make-Or-Break Time For Portable Stimulus
We hear a lot from vendors about the new Portable Stimulus Standard, but how ...
October 25, 2018
by Neil Johnson
Architect's Diary

Looking For The Elephant In The Valley
Female role models doing exceptional things in tech have always existed. Hope...
March 27, 2018
by Kavya Ram Mohan

Knowledge Centers
Entities, people and technologies explored


  Trending Articles

China’s Foundry Biz Takes Big Leap Forward

30 facilities planned, including 10/7nm processes, but trade war and economic factors could slow progress.

by Mark LaPedus

What’s Next For AI, Quantum Chips

Leaders of three R&D organizations, Imec, Leti and SRC, discuss the latest chip trends in AI, packaging and quantum computing.

by Mark LaPedus

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Applied Materials’ VP looks at what’s next for semiconductor manufacturing and the impact of variation, new materials and different architectures.

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What could make this memory type stand out from the next-gen memory crowd.

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In-Memory Computing Challenges Come Into Focus

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