Systems & Design

Top Stories

Key Drivers In New Chip Industry Outlook

CEOs and analysts examine winners and losers and where demand is shifting.

The Murky World Of AI Benchmarks

What works for one application may be wholly inadequate for another; accuracy may vary by use case.

Inevitable Bugs

What differentiates an avoidable bug from an inevitable bug? Experts try to define the dividing line.

Practical Processor Verification

When creating a new processor, how much verification is required? Setting the right ROI is important.

Using Processor Trace At The System Level

More on-chip interactions and design heterogeneity is rekindling interest in a well-worn technology.

Re-Imagining The GPU

How a basic processing element is being transformed by RISC-V, partitioning and inferencing.

Medical, Industrial & Aerospace IC Design Changes

Strict quality, safety and security requirements and increasing complexity are pushing companies to adopt some leading-edge commercial approaches.

Software-Defined Hardware Gains Ground — Again

AI applications are prompting chipmakers to take another look at different options for reconfigurable hardware.

Do You Trust Your IP Supplier?

How secure is the IP that you are integrating into your system? Accellera wants to help with that.

3nm: Blurring Lines Between SoCs, PCBs And Packages

The end of Moore's Law is providing options for shifting what goes where and how it gets designed.

More Top Stories »

Round Tables

Portable Stimulus And Digital Twins

Experts at the Table: How Portable Stimulus plays with the digital twin and the drive toward system-level coverage.

RISC-V Markets, Security And Growth Prospects

Experts at the Table: Why RISC-V has garnered so much attention, what still needs to be done, and where it will likely find its greatest success.

Migrating 3D Into The Mainstream

Experts at the Table: The creation of complex, packaged systems affects everything in the design flow and requires a systems approach.

RISC-V Challenges And Opportunities

Who makes money with an open-source ISA, the current state of the RISC-V ecosystem, and what differentiates one vendor from the next.

Extending Portable Stimulus

Experts at the Table: With the initial standard in place, what can we expect in terms of broadening its scope to other domains and applications?

More Roundtables »


Rising Packaging Complexity

Why advanced packaging is still so difficult.

Speeding Up Verification Using SystemC

How HLS plus formal can significantly reduce optimization and debug time.

Timing Closure At 7/5nm

Why shifting left in a complex design is critical.

Banking On FPGA Prototyping

Where the biggest savings are in ASIC design.

Fusing Implementation And Verification

Re-using Tcl scripts to reduce cost and potential errors.

More Multimedia »

See All Posts in System-Level Design »

Latest Blogs

What Were They Thinking

The Meaning Of Verification

A change in design philosophy means that verification has to adapt, but it is...
April 27, 2020
Editor's Note

A Node Too Far?

Planar scaling is running out of steam, even if it's technologically possible.
April 23, 2020
A System Perspective

5G Brings New Verification Challenges

The number of tests required to verify 5G networking SoCs is growing tremendo...
Looking Past The Horizon

Analog Design Needs To Change

On their own, better tools aren't enough to keep pace with analog design chal...
Frankly Speaking

Math And Electronic Design Automation

What the universal language means to the development of electronic systems.
Rule The Bugs

The Debug Problem…

...Why the heck did it take me three days to find this bug?
Embedded Customization

The Hidden Costs of Open Source

Even if the RTL and a toolchain are available for free, there are plenty of c...
Just A Formality

Access To Verification Knowledge While Remote Working

Participate in a weekly scavenger hunt and enjoy educational opportunities.
Sharpening Your Edge

Connectivity Key To Growing MCU Market

The rapidly growing connected IoT market offers ideal conditions for dynamic ...
Design & Verification

Developing 4K Video Projects With FPGAs

Ultra high definition content is everywhere, but technical challenges in deve...
RISC-V Design Verification

Setting Up RISC-V Implementation Verification

How to set up and manage regressions in a lightweight verification tool.
March 26, 2020

Knowledge Centers
Entities, people and technologies explored

  Trending Articles

EUV’s Uncertain Future At 3nm And Below

Manufacturing chips at future nodes is possible from a technology standpoint, but that’s not the only consideration.

The Murky World Of AI Benchmarks

What works for one application may be wholly inadequate for another; accuracy may vary by use case.

Key Drivers In New Chip Industry Outlook

CEOs and analysts examine winners and losers and where demand is shifting.

‘More Than Moore’ Reality Check

Multi-chip design is becoming more mainstream, but gaps remain.

Spiking Neural Networks: Research Projects or Commercial Products?

Opinions differ widely, but in this space that isn’t unusual.