System-Level Design

Top Stories

Mitigating Risk Through Verification

Automatic coverage model generation technology continues to advance.

Looking Beyond The CPU

While CPUs continue to evolve, performance is no longer limited to a single processor type or process geometry.

Bare Metal Programming

New requirements for visibility drive different options, particularly for safety and security.

IP Tracking and Management

Experts at the Table, part 1: What are the important elements of an IP tracking and management system for providers and users?

Overcoming Gender Stereotypes In Tech

Problems run deeper in organizations than a survey of top executives would indicate.

The Impact of Domain Crossing on Safety

Experts at the Table, part 3: What addition problems does this create in application areas, such as automotive? When will we see more automated sol...

The Impact of Moore’s Law Ending

Chips will cost more to design and manufacture even without pushing to the latest node, but that's not the whole story.

What Makes A Good AI Accelerator

Optimizing processor architectures requires a broader understanding data flow, latency, power and performance.

EDA Cloud Adoption Hits Speed Bumps

What problems are prohibiting semiconductor design moving into the Cloud? Steps are being taken to overcome them.

From Physics To Applications

eSilicon's CEO zeroes in on the impact of AI and advanced packaging on ASIC design.

More Top Stories »



Round Tables

IP Tracking and Management

Experts at the Table, part 1: What are the important elements of an IP tracking and management system for providers and users?

The Impact of Domain Crossing on Safety

Experts at the Table, part 3: What addition problems does this create in application areas, such as automotive? When will we see more automated sol...

So Many Waivers Hiding Issues

Experts at the Table, part 2: Domain crossings can produce thousands of waivers. How does a team put in place a methodology for dealing with them?

Domain Crossing Nightmares

Experts at the Table, part 1: How many domain crossings exist in a typical SoC today and when is the right time to verify their correctness?

Using More Verification Cores

Experts at the Table, part 3: How has the software industry been dealing with parallelization. What can we learn from them and what can we teach them?

More Roundtables »



Multimedia

Formal Signoff

What makes one assertion better than another?

Heterogeneous Computing Verification

How to verify increasingly complex chips.

Formal Datapath Verification

How to achieve high confidence in data manipulation in a design.

Building AI SoCs

How to develop AI chips when algorithms are changing so quickly.

Using High-Bandwidth Memory

Tech Talk: Designing for high-throughput computing.

More Multimedia »



See All Posts in System-Level Design »

Latest Blogs

Editor's Note

Methodologies And Flows In A Rapidly Changing Market

The problem isn't the tools. It's the rate of innovation.
November 29, 2018
What Were They Thinking

Patently Absurd

Sometimes you can find some gems when you dig into the patent system.
Just A Formality

Heterogeneous Computing Raises The Bar For Functional Ver...

Programmable SoCs are shaping up to be an important part of the semiconductor...
Frankly Speaking

Virtual Design Chains At The EDA Forum

A look at virtual platforms in the automotive design process, from OEMs to EDA.
Looking Past The Horizon

Physical Verification In The Cloud

Why the cloud is becoming necessary in complex designs.
Semi Thoughts

Supercomputers Are For Everyone

High-performance computing is no longer limited to the ultra-high end of the ...
A System Perspective

Cracking The Mixed-Signal Verification Code

Outdated methodologies hamper mixed-signal design success.
Against The Grain

Make-Or-Break Time For Portable Stimulus

We hear a lot from vendors about the new Portable Stimulus Standard, but how ...
October 25, 2018
Design & Verification

Giving Cars A Bird’s-Eye View

How to build an automotive vision monitoring system using FPGAs.
September 27, 2018
Intelligent Analytics

Bugs With Long Tails Can Be Costly Pests

In the world of servers and HPC, the smallest of inefficiencies can build int...
April 26, 2018
Architect's Diary

Looking For The Elephant In The Valley

Female role models doing exceptional things in tech have always existed. Hope...
March 27, 2018

Knowledge Centers
Entities, people and technologies explored


  Trending Articles

AI Chip Architectures Race To The Edge

Companies battle it out to get artificial intelligence to the edge using various chip architectures as their weapons of choice.

Foundries Prepare For Battle At 22nm

Bulk CMOS, FD-SOI and finFETs all on tap as big players vie for differentiation. But where will chipmakers go after 28nm?

Where Advanced Packaging Makes Sense

Experts at the Table, Part 1: Impact on the supply chain, who’s using advanced packaging, and the cost of packaging versus device scaling.

Getting Down To Business On Chiplets

Consortiums seek ways to ensure interoperability of hardened IP as way of cutting costs, time-to-market, but it’s not going to be easy.

Looking Beyond The CPU

While CPUs continue to evolve, performance is no longer limited to a single processor type or process geometry.