No More Pizza! The Power Of HPC To Answer: “What’s For Dinner?”


The other night my wife and I were trying to pick a place we could both agree on for dinner. If you’ve ever been in this situation, you know it can be a difficult problem to solve. I decided to short circuit the usual torture by asking our virtual assistant for a solution. “Hey [Virtual Assistant], where’s a good place to eat?” Thus ensued 15 minutes of intermittent, wrong answers, misc... » read more

Clock Domain Crossing Signoff Through Static-Formal-Simulation


By Sudeep Mondal and Sean O'Donohue Clocking issues are one of the most common reasons for costly design re-spins. This has been the driving factor in the ever-increasing demand for Clock Domain Crossing (CDC) analysis tools. Today, the majority of IP and SoC teams are focusing on “Structural CDC” analysis, which is important but not sufficient. Structural CDC analysis ensures that the d... » read more

Which Glitch Is Which?


Glitch is a commonly used term in modern vernacular, used to identify unexpected problems in everything from the space race, web site down time, or a crash of your latest mobile phone app. In electronics design glitch has a more specific meaning, referring to unnecessary signal transitions in a combinational circuit. Eliminating this extra switching activity can save power consumption, especial... » read more

Automation And Correct By Construction Will Empower 3D-IC Adoption


When research on 3D ICs was in full swing around 2009, I had been researching on how through-silicon-via (TSV) was related to thermal in a semiconductor chip-making company, and it seemed logical that 3D ICs would become mainstream. However, during the past 10 years, use of 3D stacked die has been applied to only a few applications, such as memory or image sensors, and the 2.5D solution using i... » read more

Shift-Left Low Power Verification With UPF Information Model


By Himanshu Bhatt, Shreedhar Ramachandra and Narayanan Ganesan Low power testbenches today have no visibility of the UPF objects and their states during a low power simulation. This has been one of the factors limiting the users from writing re-usable low power testbenches that can monitor the UPF objects and react to the state changes of UPF objects. To meet this requirement for the user to... » read more

Where Are We On The Road To Artificial Intelligence In Chip Design?


It’s hard to find an article today that doesn’t talk about how Artificial Intelligence is going to solve every possible problem in the world. From self-driving cars, to robots running an entire hotel (in Japan), to voice assistants answering your every question, it appears that every problem can be solved with AI. As so often in life, the true answer is: it depends. It depends on the nature... » read more

Building Bridges: A New DFT Paradigm


Over the last twenty years, structural testing with scan chains has become pervasive in chip design methodology. Indeed, it’s remarkable to think that most electronic devices we interact with today (think smartphones, laptops, televisions, etc.) contain hundreds to thousands of interconnected scan chains used to verify that the semiconductors were manufactured without defects. Because the imp... » read more

Accelerate SSD Software Development And System Validation


The amount of data coming at us or that we produce ourselves in our daily lives continues to grow exponentially. It’s become the norm to stream movies and TV series from Netflix, as well as upload our own videos on YouTube. On top of this, a major shift in automotive (ADAS, autonomous driving) and surveillance are boosting the amount of data exchange that is happening every second. With th... » read more

MISing In Signoff


Timing signoff is critical to ensure your design will perform as expected before it is taped out. For many designs, signoff and subsequent ECOs are focused on the performance target and iterating to meet that.  Once the performance goals are met then the attention passes onto hold-time fixing and then, usually, quickly onto tapeout.  However, even after extensive signoff analysis, silicon fai... » read more

Compute And AI In Next-Generation SSD Designs


Over the last 40 years digital storage has advanced at an amazing rate. Because it operates out of sight digital storage tends to be taken for granted, but today there is more storage capacity in the devices in our pockets than what existed in mainframe computers 30 years ago. With the rise of artificial intelligence (AI) this trend will continue and the results will be nothing less than astoun... » read more

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