category: Looking Past The Horizon

category: Auto, Security & Edge AI

Faster Verification Debug With AI
By Taruna Reddy - 28 May, 2026 - Comments: 0

Every stage of semiconductor development takes longer and requires more effort with each new generation of chips. At no stage is this more apparent than functional verification. Industry consensus is that verification consumes roughly two-thirds of development time and resources. Within verification, debug is the most challenging step, consuming a third to two-thirds of the effort. Any serious ... » read more

Solving Clock Signal Integrity And Jitter Issues
By Manoz Palaparthi - 30 Apr, 2026 - Comments: 0

A recent blog post discussed the challenges of clock signal integrity and clock jitter in deep submicron semiconductor devices. Nice, clean clock signals are degraded due to many factors, including noise in the power delivery network (PDN). Timing variation due to clock jitter is also a serious issue, especially for chips operating at low voltage with high frequencies. The impact due to cloc... » read more

IP Requirements Evolve For 3D Multi-Die Designs
By Madhumita Sanyal - 26 Mar, 2026 - Comments: 0

As Moore’s Law continues to slow and demand for compute density and bandwidth accelerates, the semiconductor industry is rapidly shifting from monolithic SoCs to 3D multi-die designs. While 2.5D integration has extended system scaling, it is no longer sufficient to meet the bandwidth, latency, and power requirements of AI, HPC, and advanced automotive applications. The move to true 3D multi-d... » read more

How IP Subsystems For Chiplets Will Unlock Your Next Wave Of Innovation
By Robert Kruger - 26 Feb, 2026 - Comments: 0

After many years of hope, promises, and commercial challenges, a robust environment that supports multi-die design is now taking shape. These events represent a sea of change for semiconductor design and manufacturing when compared to the traditional single-die monolithic design approach. Moore’s Law drove these original and substantial monolithic design accomplishments. But the massive requi... » read more

Building Trust At The Silicon Level: Secure Storage Solution For OTP IP
By Krishna Balachandran - 29 Jan, 2026 - Comments: 0

As semiconductor designs advance into cutting-edge nodes, the complexity of integrated IP blocks from diverse sources is expanding the attack surface. Traditional software-only security measures are increasingly inadequate, as attackers exploit vulnerabilities beneath the software layer. To counter these risks, designers of AI accelerators, automotive domain controllers, aerospace systems, a... » read more

Software-Defined Hardware-Assisted Verification: Scaling To Quadrillions Of Cycles For Verification In The AI Era
By Frank Schirrmeister - 23 Dec, 2025 - Comments: 0

The semiconductor industry is at an inflection point. The convergence of advanced multi-die architectures, AI-driven workloads, and rapidly evolving interface protocols is creating unprecedented design complexity. At the same time, market pressures demand faster time-to-market and higher performance, leaving little room for error. From data center to edge developments, users have to run softwar... » read more

Top Five Trends In RTL Signoff
By Suresh Babu Barla - 30 Oct, 2025 - Comments: 0

By Suresh Babu Barla and Rimpy Chugh The “shift left” of the development cycle is critical for the huge, complex chips used in such applications as AI and high-performance computing (HPC). Identifying design issues at the netlist stage occurs far too late in the design development process. At this point, addressing such problems demands significant effort, primarily because most design-r... » read more

The Critical Role Of Virtualization In Automotive Software Development For Software-Defined Vehicles
By Chahinez Hamlaoui - 13 Oct, 2025 - Comments: 0

By Chahinez Hamlaoui, Robert Fey, and David Howarth The automotive industry is undergoing a profound transformation. Vehicles are no longer just mechanical machines, they are becoming sophisticated, software-defined platforms packed with electronics and intelligence. As the number of electronic control units (ECUs) in modern vehicles climbs (with some cars now containing up to 150 ECUs), the... » read more

Chiplet Design Considerations
By Robert Kruger - 28 Aug, 2025 - Comments: 0

Chiplets are a way to offer continuing increases in compute capacity and I/O bandwidth needs by splitting SoC functionality into smaller heterogeneous or homogeneous dies called chiplets and integrating these chiplets into a single system in package (SIP), where the total silicon content can exceed the reticle size of a single SoC. SIP includes traditional package substrates but also may includ... » read more

STA Strategies For Fast And Efficient Signoff Performance For Multi-Billion Instance Designs
By Manoz Palaparthi - 31 Jul, 2025 - Comments: 0

Contemporary AI, high-performance computing (HPC), mobile, and automotive designs continue to grow in size and complexity, putting a strain on the high-capacity compute required for static timing analysis (STA) workloads. Designs continue to grow at an unprecedented rate in size and complexity, outpacing the capacity of existing high-performance compute servers. A modern STA solution that can h... » read more

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