Defining Edge Memory Requirements


Defining edge computing memory requirements is a growing problem for chipmakers vying for a piece of this market, because it varies by platform, by application, and even by use case. Edge computing plays a role in artificial intelligence, automotive, IoT, data centers, as well as wearables, and each has significantly different memory requirements. So it's important to have memory requirement... » read more

Blog Review: June 20


Mentor's Randy Allen digs into OpenACC, a collection of directives and routines to help a compiler uncover and schedule parallelism, plus an examination of the GCC implementation's performance. Cadence's Paul McLellan takes a look at the shifting opinions on FD-SOI vs. finFET as Dan Hutcheson of VLSI Research finds most see the two as complementary technologies in his latest survey. Synop... » read more

IoT Wireless Battles Ahead


"The good thing about standards is that there are so many to choose from." – Andrew S. Tanebaum The extended version of that quote adds "furthermore, if you do not like any of them, you can just wait for next year's model." That could not be truer when it comes to IoT and wireless connectivity. Every standards group is rushing to create new versions of existing standards that use less p... » read more

Enabling Ethernet Time-Sensitive Networking With Automotive-Certified IP


Automotive systems are becoming more sophisticated as they combine ADAS applications from emergency braking, collision avoidance, lane departure warning to fully autonomous driving, making predictable latency and guaranteed bandwidth in the automotive network critical. These applications require a high volume of data from different parts of the car for processing and decision making. Due to the... » read more

The Week In Review: Design


M&A MIPS has reportedly been acquired again, this time by AI startup Wave Computing. Wave focuses on data center-based neural network training using its parallel dataflow processing architecture. In March, the company signed on to use 64-bit multi-threaded processor cores from MIPS in future projects. Previously, MIPS was owned by Tallwood Venture Capital, which acquired MIPS from Imaginat... » read more

The Week in Review: IoT


Tools/Chips Synopsys rolled out a new release of its automotive exterior lighting design and analysis software. The tool calculations and generates images for multiple viewing directions and different lighting conditions. Lighting on vehicles has become far more complex than just shining a beam on the road. The latest technology can adapt to road conditions, other cars, and help illuminate the... » read more

Chip Dis-Integration


Just because something can be done does not always mean that it should be done. One segment of the semiconductor industry is learning the hard way that continued chip integration has a significant downside. At the same time, another another group has just started to see the benefits of consolidating functionality onto a single substrate. Companies that have been following Moore's Law and hav... » read more

Near-Threshold Issues Deepen


Complex issues stemming from near-threshold computing, where the operating voltage and threshold voltage are very close together, are becoming more common at each new node. In fact, there are reports that the top five mobile chip companies, all with chips at 10/7nm, have had performance failures traced back to process variation and timing issues. Once a rather esoteric design technique, near... » read more

Blog Review: June 13


Synopsys' Taylor Armerding looks at what the flaws in OpenPGP and S/MIME encryption means for the IoT and warns that the problems of patching such devices could lead to an increasing chance of security failures. Cadence's Paul McLellan takes a peek at Imec's roadmap to see what the path to 3nm looks like, how nanosheets fit in, and why design and system technology co-optimization is necessar... » read more

The Week In Review: Design


Tools & IP Synopsys added machine learning capabilities to its Design Platform. The company highlighted benefits to the PrimeTime signoff tool, which saw 5X faster power recovery in customer designs at leading-edge geometries. Renesas is using the tool, noting a 4X power ECO speed-up. ArterisIP unveiled a standalone last level cache (LLC) for high-performance SoCs. CodaCache can be adde... » read more

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