tag: Synopsys

Softening Hardware: Using Application-Specific Processors to Optimize Modern SoC Designs
By Synopsys - 12 Dec, 2018 - Comments: 0

Over the past decade, the trend in SoC design has been to add more functionality into programmable logic, but moving functionality from hardware into software comes at a cost: software requires a processor, which, if not designed for optimal efficiency, could be slower and use more power than dedicated hardware. It often makes sense to implement smaller, specialized processors to tackle specifi... » read more

Blog Review: Dec. 12
By Jesse Allen - 12 Dec, 2018 - Comments: 0

Mentor's Harry Foster checks out how much time and effort is spent on verification of FPGAs and points to the increasing demand for verification engineers. Cadence's Paul McLellan digs into IC Insights' year-end report to see how some of the top semiconductor companies stack up. Synopsys' Taylor Armerding warns that air gaps, a valuable barrier against cyberattacks, are disappearing from ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 07 Dec, 2018 - Comments: 0

RISC-V Western Digital announced big plans for RISC-V with a new open source RISC-V core, an open standard initiative for cache coherent memory over a network, and an open source RISC-V instruction set simulator. The SweRV Core features a 2-way superscalar design with a 32-bit, 9 stage pipeline core. It has clock speeds of up to 1.8Ghz on a 28mm CMOS process technology and will be used in vari... » read more

Dirty Data: Is the Sensor Malfunctioning?
By Susan Rambo - 06 Dec, 2018 - Comments: 1

Sensors provide an amazing connection to the physical world, but extracting usable data isn't so simple. In fact, many first-time IoT designers are unprepared for how messy a sensor’s data can be. Every day the IoT motion-sensor company MbientLab struggles to tactfully teach its customers that the mountain of data they are seeing is not because the sensors are faulty. Instead, the system d... » read more

Dodging The Next Generation Of Car Thieves
By Mike Borza - 06 Dec, 2018 - Comments: 0

The complexity of vehicle electronics is growing and brings with it more opportunities for hackers to penetrate the car’s defenses. More connections bring in multiple network topologies, which may or may not be secure. As they are all intertwined and interconnected, any connection to get into the vehicle’s electronics is a potential point of attack for hackers. For example, jamming RFID sig... » read more

Autonomous Vehicle Design Begins To Change Direction
By Ann Steffora Mutschler - 06 Dec, 2018 - Comments: 0

Tools that are commonly used in semiconductor design are starting to be applied at the system level for assisted and autonomous vehicles, setting the stage for more complex simulated scenarios and electronic system design. Simulation is well understood for designing automotive ICs, but now it also is being used to design vehicle architectures and sensors, as well as for sensor miniaturizatio... » read more

Managing and Securing Open Source Software in the Automotive Industry
By Synopsys - 05 Dec, 2018 - Comments: 0

Open source software is a significant contributor to the rapid evolution of modern technologies across every industry, and automotive is no exception. Black Duck by Synopsys software audits have revealed open source components in 23% of automotive applications. It’s prudent to consider the risks associated with inadequate application security risk management practices and the threat of mal... » read more

Blog Review: Dec. 5
By Jesse Allen - 05 Dec, 2018 - Comments: 0

Mentor's Harry Foster digs into verification effectiveness in FPGA projects and what it means that so many non-trivial bugs escape into production. Cadence's Paul McLellan checks out an effort to integrate photonics with CMOS and find the tradeoffs in three different approaches, plus the view of photonics as applied to military aircraft. Synopsys' Richard Solomon shares some highlights on... » read more

Formal Signoff
By Ed Sperling - 04 Dec, 2018 - Comments: 0

Xiaolin Chen, senior AE at Synopsys, looks at what’s good enough coverage, what makes one assertion better than another, and where the potential holes are in verification. https://youtu.be/nBtKE0gDHBU » read more

Making Sure A Heterogeneous Design Will Work
By Ed Sperling - 03 Dec, 2018 - Comments: 0

An explosion of various types of processors and localized memories on a chip or in a package is making it much more difficult to verify and test these devices, and to sign off with confidence. In addition to timing and clock domain crossing issues, which are becoming much more difficult to deal with in complex chips, some of the new devices are including AI, machine learning or deep learning... » read more

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