ESD Verification For 2.5D And 3D-ICs

By Siemens EDA - 10 Dec, 2024 - Comments: 0

Ensuring your integrated circuit (IC) design can withstand electrostatic discharge (ESD) events without incurring damage or failure is an extremely important activity in IC circuit design and verification. While automated flows for ESD verification are well-established for regular 2D ICs, 2.5D and 3D integration presents new challenges in both ESD design and verification. The new automated ESD ... » read more

Testing For Thermal Issues Becomes More Difficult

By Gregory Haley - 10 Dec, 2024 - Comments: 0

Increasingly complex and heterogeneous architectures, coupled with the adoption of high-performance materials, are making it much more difficult to identify and test for thermal issues in advanced packages. For a single SoC, compressing higher functionality into a smaller area concentrates the processing and makes thermal effects more predictable. But that processing can happen anywhere in a... » read more

Efficient ESD Verification For 2.5/3D Automotive ICs

By Dina Medhat - 09 Dec, 2024 - Comments: 0

Protection against electrostatic discharge (ESD) events is an extremely important aspect of integrated circuit (IC) design and verification, particularly for 2.5/3D designs targeted for automotive systems. ESD events cause severe damage to ICs due to a sudden and unexpected flow of electrical current between two electrically charged objects. This current may be caused by contact, an electrical ... » read more

The Evolution of HBM

By Ed Sperling - 04 Dec, 2024 - Comments: 0

High-bandwidth memory originally was conceived as a way to increase capacity in memory attached to a 2.5D package. It has since become a staple for all high-performance computing, in some cases replacing SRAM for L3 cache. Archana Cheruliyil, senior product marketing manager at Alphawave Semi, talks about how and where HBM is used today, how it will be used in the future, why it is essential fo... » read more

Open-Source, Chiplet-Compatible RISC-V Controller

By Technical Paper Link - 22 Oct, 2024 - Comments: 0

A new technical paper titled "ControlPULPlet: A Flexible Real-time Multi-core RISC-V Controller for 2.5D Systems-in-package" was published by researchers at ETH Zurich and University of Bologna. Abstract "The increasing complexity of real-time control algorithms and the trend toward 2.5D technology necessitate the development of scalable controllers for managing the complex, integrated oper... » read more

What Comes After HBM For Chiplets

By Brian Bailey - 18 Sep, 2024 - Comments: 0

Experts At The Table: Semiconductor Engineering sat down to discuss what will trigger the creation of a commercial chiplet marketplace, and what those chiplet-based designs will look like, with Elad Alon, CEO of Blue Cheetah; Mark Kuemerle, vice president of technology at Marvell; Kevin Yee, senior director of IP and ecosystem marketing at Samsung; Sailesh Kumar, CEO of Baya Systems; and Tanuja... » read more

Higher Density, More Data Create New Bottlenecks In AI Chips

By Adam Kovac - 12 Sep, 2024 - Comments: 0

Data movement is becoming a bigger problem at advanced nodes and in advanced packaging due to denser circuitry, more physical effects that can affect the integrity of signals or the devices themselves, and a significant increase in data from AI and machine learning. Just shrinking features in a design is no longer sufficient, given the scaling mismatch between SRAM-based L1 cache and digital... » read more

Striking A Balance On Efficiency, Performance, And Cost

By Ed Sperling - 11 Sep, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss power-related issues such as voltage droop, application-specific processing elements, the impact of physical effects in advanced packaging, and the benefits of backside power delivery, with Hans Yeager, senior principal engineer, architecture, at Tenstorrent; Joe Davis, senior director for Calibre interfaces and EM/IR product m... » read more

New AI Processors Architectures Balance Speed With Efficiency

By Ed Sperling - 04 Sep, 2024 - Comments: 1

Leading AI systems designs are migrating away from building the fastest AI processor possible, adopting a more balanced approach that involves highly specialized, heterogeneous compute elements, faster data movement, and significantly lower power. Part of this shift revolves around the adoption of chiplets in 2.5D/3.5D packages, which enable greater customization for different workloads and ... » read more

A New Generation Of 7400 Socket

By Brian Bailey - 29 Aug, 2024 - Comments: 0

When I was 18, and just been accepted at Brunel University in West London to start my undergraduate degree in electrical and electronic engineering, I sent off a letter to Texas Instruments telling them about the journey ahead of me and asked if they could they send me a copy of their TTL Data Book. A few weeks later a package arrived and there it was. This incredible brown/orange book, thicker... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: 2.5D

ESD Verification For 2.5D And 3D-ICs

Testing For Thermal Issues Becomes More Difficult

Efficient ESD Verification For 2.5/3D Automotive ICs

The Evolution of HBM

Open-Source, Chiplet-Compatible RISC-V Controller

What Comes After HBM For Chiplets

Higher Density, More Data Create New Bottlenecks In AI Chips

Striking A Balance On Efficiency, Performance, And Cost

New AI Processors Architectures Balance Speed With Efficiency

A New Generation Of 7400 Socket