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Design For Test Data


As design pushes deeper into data-driven architectures, so does test. Geir Eide, director for product management of DFT and Tessent Silicon Lifecycle Solutions at Siemens Digital Industries Software, talks with Semiconductor Engineering about a subtle but significant shift for designing testability into chips so that test data can be used at multiple stages during a device’s lifetime. » read more

Debug: The Schedule Killer


Debug often has been labeled the curse of management and schedules. It is considered unpredictable and often can happen close to the end of the development cycle, or even after – leading to frantic attempts at work-arounds. And the problem is growing. "Historically, about 40% of time is spent in debug, and that aspect is becoming more complex," says Vijay Chobisa, director of product manag... » read more

CEO Outlook: More Data, More Integration, Same Deadlines


Experts at the Table: Semiconductor Engineering sat down to discuss the future of chip design and EDA tools with Lip-Bu Tan, CEO of Cadence; Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of Siemens IC EDA; John Kibarian, CEO of PDF Solutions; Prakash Narain, president and CEO of Real Intent; Dean Drako, president and CEO of IC Manage; and Babak Taheri, CEO of Silvaco. What ... » read more

How To Improve Software? Start With The Hardware


By Travis Walton and Udi Maor Physicist Art Rosenfeld was working late at Lawrence Berkeley National Lab one night in 1973 when he noticed it. Despite an ongoing energy crisis, his colleagues routinely left their lights on after they left. Waste was one of the largest consumers of power in the state, he soon discovered: pilot lights consumed 10% of gas in homes. Switching from physics to ... » read more

Customizing Chips For Power And Performance


Sandro Cerato, senior vice president and CTO of the Power & Sensor Systems Business Unit at Infineon Technologies, sat down with Semiconductor Engineering to talk about fundamental shifts in chip design with the rollout of the edge, AI, and more customized solutions. What follows are excerpts of that conversation. SE: The chip market is starting to fall into three distinct buckets, the e... » read more

11 Ways To Reduce AI Energy Consumption


As the machine-learning industry evolves, the focus has expanded from merely solving the problem to solving the problem better. “Better” often has meant accuracy or speed, but as data-center energy budgets explode and machine learning moves to the edge, energy consumption has taken its place alongside accuracy and speed as a critical issue. There are a number of approaches to neural netw... » read more

Securing ICs With Information Flow Analysis


Following the data has new meaning when it comes to security. Alric Althoff, senior hardware security engineer at Tortuga Logic, talks about tracking the flow of data through a hardware design over time, including what happens with roots of trust, how this works with existing tools and methodologies, and what to think about when tracing potential security risks. » read more

Edge-Inference Architectures Proliferate


First part of two parts. The second part will dive into basic architectural characteristics. The last year has seen a vast array of announcements of new machine-learning (ML) architectures for edge inference. Unburdened by the need to support training, but tasked with low latency, the devices exhibit extremely varied approaches to ML inference. “Architecture is changing both in the comp... » read more

Designing Low Energy Chips And Systems


Energy optimization is beginning to shift left as design teams begin examining new ways to boost the performance of devices without impacting battery life or ratcheting up electricity costs. Unlike power optimization, where a skilled engineering team may reduce power by 1% to 5%, energy efficiency may be able to cut effective power in half. But those gains require a significant rethinking of... » read more

The Lost Art Of Processor Verification


As we celebrate over 50 years of microprocessors, the industry has embraced every generation of silicon process technology with architectural innovation plus new design methods that have supported innovations in almost every market segment. The interest around RISC-V is opening up increased activity around new approaches to optimize designs for the next generation of devices across multiple mar... » read more

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