In-Chip Monitoring Becoming Essential Below 10nm


Rising systemic complexity and more potential interactions in heterogeneous designs is making it much more difficult to ensure a chip, or even a block within a chip, will functioning properly without actually monitoring that behavior in real-time. Continuous and sporadic monitoring have been creeping into designs for the past couple of decades. But it hasn’t always been clear how effective... » read more

Week In Review: Design, Low Power


Tools & IP Cadence introduced the Tensilica Vision Q7 DSP, which provides up to 1.82 TOPS and is specifically optimized for simultaneous localization and mapping (SLAM). The DSP has a very long instruction word (VLIW) SIMD architecture, an enhanced instruction set supporting 8/16/32-bit data types and optional VFPU support for single and half precision, and a number of iDMA enhancements in... » read more

The Limits Of Energy Harvesting


Energy harvesting, once considered an inexpensive alternative to low-power design and a way of achieving nearly unlimited power in mobile devices, has settled down to more modest expectations. This approach to generating energy through a variety of means—from solar to motion to ambient RF and even pH differences between soil and trees—has been proven to work. The problem is that it doesn... » read more

Raising The Abstraction Level For Power


Power-aware design is still a relatively new concern for many semiconductor products, and since inception it has changed several times and in different ways. Initially people were concerned about peak power. Today, they care about peak, total energy, thermal and other effects. The industry has tried several abstractions ranging from system-level analysis, which promised to swamp implementati... » read more

End-To-End Cell–Pack–System Solution: Rechargeable Lithium-Ion Battery


Industry has become more interested in developing optimal energy storage systems as a result of increasing gasoline prices and environmental concerns. A major application for energy storage use is hybrid electric vehicles (HEVs) and electric vehicles (EVs). The rechargeable energy storage system is a key design issue, as it dominates overall vehicle performance. The system as a whole must deliv... » read more

Blog Review: May 8


Synopsys' Taylor Armerding warns that the threat of cyber war on the financial system is a real possibility and points to four major vulnerability concerns. Cadence's Meera Collier takes a look at bees and technology, from smart hives to sensors that can be carried on the insects' backs. Mentor's Brent Klingforth argues that electrical and mechanic designers need to seamlessly share infor... » read more

Week In Review: Design, Low Power


ANSYS acquired the assets of DfR Solutions, a developer of automated design reliability analysis software. Founded in 2004 and based in Maryland, DfR's tool translates ECAD and MCAE data into 3D finite element models, automates thermal derating and performs thermal and mechanical analysis of electronics earlier in the design cycle. "ANSYS brings industry-leading electronic simulation capabiliti... » read more

Blog Review: May 1


Synopsys' Melissa Kirschner questions whether a unified standard for safety-related code development will be enough to secure connected cars as MISRA and AUTOSAR merge C++ guidelines. In a podcast, Mentor's Brent Klingforth and John McMillan share questions and answers about rigid-flex PCB design, including the value of incorporating flexible circuits and the key challenges faced when doing ... » read more

Focus Shifting From 2.5D To Fan-Outs For Lower Cost


Semiconductor Engineering sat down to discuss advanced packaging with Calvin Cheung, vice president of engineering at ASE; Walter Ng, vice president of business management at UMC; Ajay Lalwani, vice president of global manufacturing operations at eSilicon; Vic Kulkarni, vice president and chief strategist in the office of the CTO at ANSYS; and Tien Shiah, senior manager for memory at Samsung. W... » read more

Week In Review: Design, Low Power


A new working group has been proposed by Accellera to focus on the standardization of analog/mixed signal extensions (AMS) for the Universal Verification Methodology (UVM) standard. “Our ambition is to apply UVM for both digital and analog/mixed-signal verification,” said Martin Barnasconi, Accellera Technical Committee Chair. “The UVM-AMS PWG will assess the benefits of creating analog a... » read more

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