tag: Mentor

Blog Review: May 14
By Jesse Allen - 14 May, 2025 - Comments: 0

Siemens’ Stephen V. Chavez finds that proper PCB high voltage spacing between conductive elements is key to reliability and understanding the principles of clearance (through-air spacing) and creepage (along-surface spacing) is critical. Cadence’s Frank Ferro checks out how the new HBM4 standard boosts bandwidth and addresses key issues in the data center, including the growing size of L... » read more

Chip Industry Week in Review
By The SE Staff - 09 May, 2025 - Comments: 0

Check out the Inside Chips podcast for our behind-the-scenes analysis. The U.S. government is rescinding a Biden-era AI export rule that would have imposed complex restrictions on how U.S. chip and AI technology is sold abroad, a move welcomed by companies like Nvidia, reports Bloomberg. While new, simpler guidelines are expected in the coming months, the decision introduces short-term uncer... » read more

Shifting Left With DFT To Optimize Productivity, Testability, And Time-To-Market
By Siemens EDA - 08 May, 2025 - Comments: 0

This paper discusses one of the Siemens EDA shift-left strategies in the RTL-to-signoff flow: shift-left design-for-test (DFT). Tessent RTL Pro software automates the analysis and insertion of Tessent VersaPoint test point technology, LBIST-OST test points, dedicated scan wrapper cells and x-bounding logic as behavioral code at the RTL level. Tessent RTL Pro builds on Tessent’s market-leading... » read more

Identifying Sources Of Silent Data Corruption
By Laura Peters - 08 May, 2025 - Comments: 0

Silent data errors are raising concerns in large data centers, where they can propagate through systems and wreak havoc on long-duration programs like AI training runs. SDEs, also called silent data corruption, are technically rare. But with many thousands of servers, which contain millions of processors running at high utilization rates, these damaging events become common in large fleets. ... » read more

IoT Security By Design
By Lee Harrison - 08 May, 2025 - Comments: 0

After years of anticipation and steady uptake, the Internet of Things (IoT) seems poised to cross over into mainstream business use. The percentage of businesses utilizing IoT technologies has risen from 13% in 2014 to approximately 25% today. Global projections indicate that the number of IoT-connected devices is expected to reach 43 billion by 2030, nearly tripling from the figures in 2018. O... » read more

Radiation, Temperature, Power Challenges For Chips In Space
By Liz Allan - 07 May, 2025 - Comments: 0

Mission-critical hardware used in space is not supposed to fail at all, because lives may be lost in addition to resources, availability, performance, and budgets. For space applications, failure can occur due to a range of factors, including the weather on the day of launch, human error, environmental conditions, unexpected or unknown hazards and degradation of parts to chemical factors, aging... » read more

Blog Review: May 7
By Jesse Allen - 07 May, 2025 - Comments: 0

Cadence’s Mayank Bhatnagar examines the challenge of ensuring the functional safety of disaggregated designs and how UCIe can serve as a certified way to connect individual components. Siemens’ Charlie Olson explores the causes of inter-domain leakage when a DC path is formed between two power rails and how to overcome the limitations of traditional electrical rule checking. Synopsys�... » read more

Three-Way Race To 3D-ICs
By Ed Sperling - 05 May, 2025 - Comments: 1

Intel Foundry, TSMC, and Samsung Foundry are scrambling to deliver all the foundational components of full 3D-ICs, which collectively will deliver orders of magnitude improvements in performance with minimal power sometime within the next few years. Much attention has been focused on process node advances, but a successful 3D-IC implementation is much more complex and comprehensive than just... » read more

Chip Industry Week in Review
By The SE Staff - 02 May, 2025 - Comments: 0

Check out the Inside Chips podcast for our behind-the-scenes analysis of changes at Intel Foundry. Intel rolled out its updated process technology roadmap this week, along with early process design kit (PDK) for its 14A gate-all-around process technology. That node will utilize high-NA EUV, and include direct contact power delivery, the second generation of its backside power delivery techno... » read more

Cyber Threats Multiply With Commercial Chiplets
By Ann Mutschler - 01 May, 2025 - Comments: 0

The commercialization of chiplets will significantly boost the potential for attacks on hardware, requiring a much broader set of security measures and processes at every level of the supply chain, including traceability from initial design to end of life. Much progress has been made in recent years on security measures, including everything from identifying unusual data traffic inside a chi... » read more

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