CEO Outlook On Chip Industry


Semiconductor Engineering sat down with Wally Rhines, president and CEO of Mentor, a Siemens Business; Simon Segars, CEO of Arm; Grant Pierce, CEO of Sonics; and Dean Drako, CEO of IC Manage. What follows are excerpts of that conversation. L-R: Dean Drako, Grant Pierce, Wally Rhines, Simon Segars. Photo: Paul Cohen/ESD Alliance SE: What are the big changes ahead, and where do you see th... » read more

Blog Review: May 23


Cadence's Paul McLellan digs into the problems of test for 3D ICs s well as new approaches to cell-aware test, modular test and realistic IR drop at CDNLive EMEA. Mentor's Colin Walls shares four more embedded software tips, including always initializing a variable and when to use ++i instead of i++. Synopsys' Taylor Armerding points to a new way that phishing attacks could get around Mic... » read more

200mm Fab Crunch


Growing demand for analog, MEMS and RF chips continues to cause acute shortages for both 200mm fab capacity and equipment, and it shows no sign of letting up. Today, 200mm fab capacity is tight with a similar situation projected for the second half of 2018 and perhaps well into 2019. In fact, 2018 will likely represent the third consecutive year that 200mm fab capacity will be tight. The sam... » read more

The Week In Review: Manufacturing


Fab tools and test VLSI Research released its annual "Customer Satisfaction Survey" and listed "THE BEST Suppliers" of 2018. VLSI Research received feedback from more than 94% of the chip market and 76% of subsystems customers for this year’s survey. Who are the winners? Applied Materials reported its second quarter results, along with its business outlook. Compared to the second quarter ... » read more

Global Investment Is Key To The Semiconductor Ecosystem


In response to the European Commission’s (EC) proposed framework for screening foreign direct investments (FDI), SEMI, representing the global electronics manufacturing supply chain, offers three recommendations for consideration by EU policymakers: To support the sophisticated global ecosystem of semiconductor manufacturers, the EU should remain open to global investment. More efforts sho... » read more

Blog Review: May 16


Synopsys' Eric Huang looks back at why the USB On-The-Go specification was revolutionary in getting devices talking to each other and how the shift to USB Type-C and Dual Mode means it isn't needed anymore. Mentor's Andrew Macleod examines four different shift-left methodologies and the benefits of each in the context of automotive and autonomous vehicle design. Cadence's Paul McLellan ch... » read more

Blog Review: May 9


Mentor's Doug Amos explains the differences (and similarities) between verification and validation, why switching between engines needs to be simpler, and why the limits of verification are driving a growth in validation importance. Synopsys' Melissa Kirschner provides a primer on 5G and the five technologies that will need to work in tandem to bring the promised high speeds and low latency.... » read more

Blog Review: May 2


Arm's Greg Yeric looks towards the future of 3D ICs with a dive into transistor-level 3D, including the different proposed methods of stacking transistors, power/performance benefits, and challenges such as parasitic resistance. Mentor's Kurt Takara, Chris Kwok, Dominic Lucido, and Joe Hupcey III explain how a custom synchronizer methodology can help avoid CDC mistakes and errors in FPGA des... » read more

The Week In Review: Manufacturing


Chipmakers As reported, Intel is struggling at 10nm. Intel already has encountered some difficulties, as the chip giant late last year pushed out the volume ramp of its new 10nm process from the second half of 2017 to the first part of 2018, according to analysts. Intel continues to struggle with 10nm, and has delayed the volume ramp again, according to multiple reports. During its earnings... » read more

Blog Review: Apr. 25


Mentor's Cristian Filip digs into SerDes design with a focus on the adoption and evolution of Channel Operating Margin (COM) as a tool for ensuring compliance of high-speed designs and why it's useful even if its mathematical procedure might be intimidating at the beginning. Cadence's Paul McLellan explains the importance of IBIS and AMI standards for SerDes design and why the upcoming DDR5 ... » read more

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