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Week In Review: Design, Low Power


Tools Cadence unveiled Cerebrus Intelligent Chip Explorer, a new machine learning-based tool to drive the Cadence RTL-to-signoff implementation flow. The tool aims to use reinforcement learning to find flow solutions that otherwise might not be explored and applies models to future designs. The company says it can improve productivity up to 10X and PPA up to 20% with optimization of the flow f... » read more

Chip Shortages Grow For Mature Nodes


The current wave of chip shortages is expected to last for the foreseeable future, particularly for a growing list of critical devices produced in mature process nodes. Chips manufactured at mature nodes typically fall under the radar, but they are used in nearly every electronic device, including appliances, cars, computers, displays, industrial equipment, smartphones, and TVs. Many of thes... » read more

Blog Review: July 21


Cadence's Paul McLellan listens in as Partha Ranganathan of Google argues that a new era of Moore's Law is emerging, defined both by the efficient design of hardware accelerators and improving the ways that hardware is utilized. Siemens EDA's Chris Spear continues exploring classes in SystemVerilog with a look at the relationship between the class variables that point to an object and how to... » read more

Sensor Fusion Everywhere


How do you distinguish between background noise and the sound of an intruder breaking glass? David Jones, head of marketing and business development for intuitive sensing solutions at Infineon, looks at what types of sensors are being developed, what happens when different sensors are combined, what those sensors are being used for today, and what they will be used for in the future. » read more

No Safety Without Dependable Security In Automotive Designs


The cyber threat faced by the automotive industry reached public awareness in 2015, when a “White Hat” research team commandeered the control electronics of a target vehicle at freeway speeds. Subsequently published details of the team’s work identified several discrete weak links that were leveraged by the researchers to create the attack. The approach illustrated a concept well-known to... » read more

Week In Review: Auto, Security, Pervasive Computing


Pervasive computing — IoT, edge, cloud, data center, and back The IoT designer Deed designed a screenless health monitor, worn on the wrist, that uses IoT (Internet of Things) building blocks from Infineon Technologies. The Get bracelet interprets hand gestures for making payments, picking up phone calls, turning up or down audio, while it also takes health data and biometrics. The system us... » read more

Lower Power Chips: What To Watch Out For


Low-power design in advanced nodes and advanced packaging is becoming a multi-faceted, multi-disciplinary challenge, where a long list of issues need to be solved both individually and in the context of other issues. With each new leading-edge process node, and with increasingly dense packaging, the potential for problematic interactions is growing. That, in turn, can lead to poor yield, cos... » read more

Gate Drive Solutions For CoolGaN 600 V HEMTs


This paper explains the gate drive requirements for Infineon’s CoolGaN 600 V e-mode HEMTs. Various driving solutions are discussed, ranging from the standard RC-coupled driver to a new differential drive concept utilizing dedicated gate driver ICs. In half-bridge topologies, a hybrid configuration combining isolated and non-isolated drivers could be an exciting alternative. Practical applicat... » read more

Benefits Of SiC For String Inverters


SiC MOSFETs in solar and energy storage applications have clear benefits compared to silicon technologies, addressing the pressing need for energy and cost savings, particularly when bidirectional power conversion is required. Ease of installation is one of the key features of high-power solar string inverters. It is beneficial if only two workers are needed to carry and install the system.... » read more

Week In Review: Design, Low Power


Tools Imperas and Valtrix inked a multi-year distribution and support agreement that makes Imperas simulation technology and RISC-V reference models available pre-integrated within Valtrix STING for RISC-V processor verification. The combined solution covers the full RISC-V specification for user, privilege, and debug modes, including all ratified standard extensions, and the near ratified (st... » read more

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