Chip Industry Week In Review


GlobalFoundries plans to acquire MIPS, adding RISC-V processor IP and PPA optimization software capabilities to its foundry offerings. MIPS will continue to operate as a standalone business within GF. The deal is expected to close in the second half of 2025. The EU rolled out new general-purpose AI rules this week to limit copyright infringement, protect public safety, and require transparency... » read more

Cache-Coherent Symmetric Multiprocessing With LX8 Controllers On HiFi DSPs


Overview This document motivates the need for a cache-coherent multicore, symmetric multiprocessor (SMP) with applications to embedded control and audio processing. It describes the current state of the art in the employment of multiple embedded processors and audio DSPs in an SoC, with a discussion of related problems that current designs face. This is followed by an introdu... » read more

AI Pushes High-End Mobile From SoCs To Multi-Die


Advanced packaging is becoming a key differentiator for the high end of the mobile phone market, enabling higher performance, more flexibility, and faster time to market than systems on chip. Monolithic SoCs likely will remain the technology of choice for low-end and midrange mobile devices because of their form factor, proven record, and lower cost. But multi-die assemblies provide more fle... » read more

6G Rollout Will Be A Patchwork At First


6G is expected to begin rolling out in 2030, but advances in 5G will inch cellular technology close enough that it will make the first 6G implementations seem more like just another upgrade. That's just the starting point, though. 6G technology gets much more interesting from there, connecting more devices at a significantly higher data rate, and enabling services that would be unattractive to ... » read more

Supercharging Nanobot Medicine With CFD And Physical AI


Envision a future where tiny robotic machines, known as nanobots, live within your body, safeguarding your health. These microscopic marvels could monitor your vitals, deliver precise therapies, and even repair damaged tissue—all autonomously. While this may sound like science fiction, advancements in computational fluid dynamic (CFD) tools are making this vision a reality by decoding th... » read more

Chip Industry Week in Review


[Editor's Note: Early edition due to the U.S. July 4th holiday.] The U.S. government lifted export restrictions that barred Synopsys, Siemens EDA, and Cadence from selling EDA tools to China. In a statement, Synopsys said it received a letter from the U.S. Commerce Department immediately rescinding those restrictions. Siemens issued a similar statement. Which tools or hardware accelerated t... » read more

Blog Review: July 2


Synopsys’ Shankar Krishnamoorthy chats with industry experts about how the combination of AI and software-defined systems is driving a re-evaluation of engineering workflows and why chip, software, and system development must evolve in unison. Siemens’ Jake Wiltgen considers the rapidly evolving and growing challenge of performing DFT verification as designs scale, with complex hierarchi... » read more

Chip Industry Week in Review


AI featured big at this week's Design Automation Conference (DAC) in San Francisco. Dozens of companies featured AI-related tools (see product section below), as well as significant improvements to existing tools and some entirely new approaches for designing chips. Among the highlights: Siemens unveiled an AI-enhanced toolset for the EDA design flow that enables customers to integrate the... » read more

Redefining SoC Design: The Shift To Secure Chiplet-Based Architectures


The semiconductor industry is undergoing a paradigm shift from monolithic system-on-chip (SoC) architectures to modular, chiplet-based designs. This transformation is driven by escalating design complexity, soaring fabrication costs, and the relentless pursuit of efficiency. However, as chiplet adoption accelerates, security becomes a critical concern, requiring robust measures to protect data,... » read more

Distributing Intelligence Inside Multi-Die Assemblies


The shift from SoCs to multi-die assemblies requires more and smarter controllers to be distributed throughout a package in order to ensure optimal performance, signal integrity, and no downtime. In planar SoCs, many of these kinds of functions are often managed by a single CPU or MCU. But as logic increasingly is decomposed into chiplets, connected to each other and memories by TSVs, hybrid... » read more

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