tag: Cadence

Virtualization In The Car
By Ann Steffora Mutschler - 06 Aug, 2020 - Comments: 0

As the automotive industry grapples with complexity due to electrification and increasing autonomy of vehicles, consolidation of ECUs within vehicles, more stringent safety and security requirements, automotive ecosystem players are looking to virtualization concepts in a number of ways to realize the vehicles of tomorrow. One way is with hardware virtualization; the ability of a device such... » read more

WiFi Evolves For The IoT
By Bryon Moyer - 06 Aug, 2020 - Comments: 0

WiFi is everywhere, and it’s the most prevalent of the communication protocols that use unlicensed spectrum. But as a common protocol for the Internet of Things (IoT), it faces challenges both because of congestion and the amount of energy it consumes. Two new approaches aim to address those concerns. One is to use multiple channels at once. The second involves the new 802.11 ah HaLow stan... » read more

Accellera Tackles Functional Safety
By Paul McLellan - 06 Aug, 2020 - Comments: 0

During DAC, Accellera had a workshop about functional safety. In case you don't know, Accellera has a relatively new working group (WG) on Functional Safety. The chair is Cadence's Alessandra Nardi, who coincidentally also received the Marie Pistilli Award for Women in EDA during DAC (you can read more about that in my post Alessandra Nardi Receives Marie Pistilli Award for Women in EDA). But ... » read more

Blog Review: Aug. 5
By Jesse Allen - 05 Aug, 2020 - Comments: 0

Rambus' Scott Best explains some more sophisticated chip attacks, such as side-channel attacks, clocking attacks, fault injection, and infrared emission analysis, and countermeasures that can be adopted against them. Arm's Mark O'Connor considers ways that deployed neural networks could adapt to examples it sees in real-world use and generate more accurate predictions. Mentor's Chris Spea... » read more

Problems And Solutions In Analog Design
By Ann Steffora Mutschler - 05 Aug, 2020 - Comments: 0

Advanced chip design is becoming a great equalizer for analog and digital at each new node. Analog IP has more digital circuitry, and digital designs are more susceptible to kinds of noise and signal disruption that have plagued analog designs for years. This is making the design, test and packaging of SoCs much more complicated. Analog components cause the most chip production test failures... » read more

Creating Better Models For Software And Hardware Verification
By Ed Sperling - 04 Aug, 2020 - Comments: 1

Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; Nasr Ullah, senior director of performance architecture at SiFive. What follows are excerpt... » read more

The Evolution Of Digital Twins
By Brian Bailey - 03 Aug, 2020 - Comments: 1

Digital twins are starting to make inroads earlier in the chip design flow, allowing design teams to develop more effective models. But they also are adding new challenges in maintaining those models throughout a chip's lifecycle. Until a couple of years ago, few people in the semiconductor industry had even heard the term "digital twin." Then, suddenly, it was everywhere, causing confusion ... » read more

Pivoting Toward Safety-Critical Verification In Cars
By Ann Steffora Mutschler - 31 Jul, 2020 - Comments: 1

The inclusion of AI chips in automotive and increasingly in avionics has put a spotlight on advanced-node designs that can meet all of the ASIL-D requirements for temperature and stress. How should designers approach this task, particularly when these devices need to last longer than the applications? Semiconductor Engineering sat down to discuss these issues with Kurt Shuler, vice president of... » read more

Open-Source Verification
By Brian Bailey - 30 Jul, 2020 - Comments: 1

Ask different people what open-source verification means and you will get a host of different answers. They range from the verification of open-source hardware, to providing an open-source verification infrastructure, to providing open-source stream generators or reference models, to open-source simulators and formal verification engines. Verification is about reducing risk. "Verification is... » read more

Computational Software: The Foundation Across Software Disciplines
By Frank Schirrmeister - 30 Jul, 2020 - Comments: 0

You may have seen the term "computational software" more often recently. What are some prominent examples? Why do we in the electronic design automation (EDA) industry have to deal with math in the first place? Wasn't chip design all about drawing polygons at one point? I’m glad you asked! Computational software supports and manages the complexity of fundamental industry trends—hyperscal... » read more

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