Week In Review: Design, Low Power


Xilinx acquired the assets of Falcon Computing Solutions, a provider of high-level synthesis (HLS) compiler optimization technology for hardware acceleration of software applications. The acquisition will be integrated into the Xilinx Vitis Unified Software Platform to automate hardware-aware optimizations of C++ applications with minimal hardware expertise. “Our compiler provides a high degr... » read more

Week In Review: Auto, Security, Pervasive Computing


Security The United States Department of Defense added China's SMIC to its blacklist for its alleged cooperation with the Chinese military, reports Reuters. U.S. investors are asked not to invest in SMIC, among 35 other companies based in China on the list. Military/aerospace China’s Chang’e-5 landed on moon, took some samples, and will rendez vous with the Chang'e-5 orbiter before ret... » read more

How Will Future Cars Interact With Humans?


Future automobiles may come with a set of controls very different from what we’re used to now. Mechanical knobs and switches already are being replaced by touchscreens, but that's just the beginning. There are a multitude of other possible ways in which drivers can interact with their vehicles, and the list is growing as technology drives down the cost of this new human-machine interface (... » read more

Using ICs To Shrink Auto’s Carbon Footprint


A large portion of the burden for reducing greenhouse gases is being handed off to makers of automotive chips and systems, which are being tasked to make vehicles drive further using less energy and with zero emissions. The effort is critical in battling climate change. According to the U.S. Environmental Protection Agency, the transportation sector represented 28.2% of 2018 greenhouse gas e... » read more

Capabilities In CAP, CHERI, And Morello


At the recent Arm DevSummit, one of the presentations mentioned CHERI and the Arm Morello board in passing. This was in the context of using capabilities (perhaps) in some future Arm processors to increase the amount of memory safety, and to protect against vulnerabilities like Spectre and Meltdown. I'd never heard of either, so I was intrigued and decided to look into the details. But the f... » read more

System Simulation For RF Link Budget Analysis


This white paper examines how a more rigorous link budget analysis of an entire system can be determined through simulation, and how performing link budget analysis enables designers to address losses, gains, and power levels to meet the operational requirements of the radio communications system. Click here to read more. » read more

Blog Review: Dec. 2


Mentor's Harry Foster investigates the effectiveness of today’s FPGA verification processes in terms of nontrivial bug escapes into production as part of the 2020 Wilson Research Group Functional Verification Study. Synopsys' Chris Clark points to how integral sensors are to the modern vehicle and key design considerations for making them more effective, safe, and reliable. Cadence's Pa... » read more

MPU Vs. MCU


There was a time when microprocessors and microcontrollers were distinct devices. There was never a question as to which one you were dealing with. But changes in the memory architecture have muddied the distinction in modern devices. There are a number of ways in which microprocessors and microcontrollers could possibly be differentiated. But there is no universal agreement as to how that s... » read more

Forward And Backward Compatibility In IC Designs


Future-proofing of designs is becoming more difficult due to the accelerating pace of innovation in architectures, end markets, and technologies such as AI and machine learning. Traditional approaches for maintaining market share and analyzing what should be in the next rev of a product are falling by the wayside. They are being replaced by best-guesses about market trends and a need to bala... » read more

Blog Review: Nov. 25


Mentor's Harry Foster finds growing complexity in FPGA design by looking at the number of embedded microprocessors, asynchronous clock domains, and safety/security features in the 2020 Wilson Research Group Functional Verification Study. Cadence's Paul McLellan points to the interim SRC/SIA Decadal Plan for Semiconductors and five big shifts it identifies in information and communication tec... » read more

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