tag: Cadence

Why It’s So Hard To Create New Processors
By Brian Bailey - 26 Mar, 2020 - Comments: 0

The introduction, and initial success, of the RISC-V processor ISA has reignited interest in the design of custom processors, but the industry is now grappling with how to verify them. The expertise and tools that were once in the market have been consolidated into the hands of the few companies that have been shipping processor chips or IP cores over the past 20 years. Verification of a pro... » read more

Making Sense Of EDA And Digital Twins
By Frank Schirrmeister - 26 Mar, 2020 - Comments: 0

There is a new buzzword in town, “digital twins.” I have been using it for a while now in the context of system-on-chip (SoC) verification as well as a little more broadly when it comes to security issues for data in general. There are some differences in emphasis across different vertical domains, based on when they are used during the life cycle, which use models are desired and what scop... » read more

Software-Defined Hardware Gains Ground — Again
By Ann Steffora Mutschler - 26 Mar, 2020 - Comments: 0

The traditional approach of running generic software on x86-based CPUs is running out of steam for many applications due to the slowdown of Moore’s Law and the concurrent exponential growth in software application complexity and scale. In this environment, the software and hardware are disparate due the dominance of the x86 architecture. “The need for and advent of the hardware accelerat... » read more

Do You Trust Your IP Supplier?
By Brian Bailey - 26 Mar, 2020 - Comments: 0

How much do you trust your IP supplier, regardless of whether IP was developed in-house or by a third-party provider? And what implications does it have a system integrator? These are important questions that many companies are beginning to ask. Today, there are few methods, other than documentation, that provide the necessary information. The software industry may be ahead of the hardware i... » read more

Intelligent System Design
By Cadence - 25 Mar, 2020 - Comments: 0

Electronics technology is proliferating to new, creative applications and appearing in our everyday lives. To compete, system companies are increasingly designing their own semiconductor chips, and semiconductor companies are delivering software stacks, to enable substantial differentiation of their products. This trend started in mobile devices and is now moving into cloud computing, automotiv... » read more

Blog Review: March 25
By Jesse Allen - 25 Mar, 2020 - Comments: 0

Rambus' Steven Woo checks out common memory systems that are used in the highest performance AI applications and points to the differences between on-chip memory, HBM, and GDDR. Mentor's Colin Walls considers whether software for embedded systems should be delivered as a binary library or source code and warns of some key potential issues when requesting source code. A Synopsys writer poi... » read more

Week In Review: Design, Low Power
By Jesse Allen - 20 Mar, 2020 - Comments: 0

Silicon Labs will acquire Redpine Signals' Wi-Fi and Bluetooth business, development center in Hyderabad, India, and extensive patent portfolio for $308 million in cash. Silicon Labs says the acquisition will expand the company's IoT wireless technology, including smart phone and industrial IoT, and accelerate its roadmap for Wi-Fi 6. The deal is expected to close in the second quarter of 2020.... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 20 Mar, 2020 - Comments: 0

National Instruments is offering free online training courses to anyone anywhere, until the end of April to help support the engineering community during COVID-19 crisis. Some instructor-led virtual training is available at reduced cost. NIWeek has been postponed this year until August 3-5, 2020. Click here for more news about how the semiconductor industry is handling COVID-19. AI, machi... » read more

Blog Review: March 18
By Jesse Allen - 18 Mar, 2020 - Comments: 0

Arm's Divya Prasad investigates whether power rails that are buried below the BEOL metal stack and back-side power delivery can help alleviate some of the major physical design challenges facing 3nm nodes and beyond. Rambus' Steven Woo takes a look at a Roofline model for analyzing machine learning applications that illustrates how AI applications perform on Google’s tensor processing unit... » read more

HBM Issues In AI Systems
By Brian Bailey - 16 Mar, 2020 - Comments: 0

All systems face limitations, and as one limitation is removed, another is revealed that had remained hidden. It is highly likely that this game of Whac-A-Mole will play out in AI systems that employ high-bandwidth memory (HBM). Most systems are limited by memory bandwidth. Compute systems in general have maintained an increase in memory interface performance that barely matches the gains in... » read more

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