Manufacturing Bits: Nov. 17


Intel’s gate-all-around FETs At the upcoming IEEE International Electron Devices Meeting (IEDM), Intel is expected to present papers on its efforts to develop gate-all-around transistors. One paper from Intel describes a more conventional gate-all-around transistor technology called a nanosheet FET. Another paper involves a next-generation NMOS-on-PMOS nanoribbon transistor technology. (F... » read more

Manufacturing Bits: Sept. 1


AI, quantum computing R&D centers The White House Office of Science and Technology Policy, the National Science Foundation (NSF), and the U.S. Department of Energy (DOE) have announced over $1 billion in awards for the establishment of several new artificial intelligence and quantum information science (QIS) research institutes in the U.S. Under the plan, the U.S. is launching seven new... » read more

Week In Review: Manufacturing, Test


Packaging Chunghwa Telecom, ASE and Qualcomm Technologies have announced plans to jointly build Taiwan's first 5G mmWave enterprise private network smart factory. As part of the plan, ASE is deploying a series of smart factory technologies within its existing Kaohsiung, Taiwan-based campus. This includes the deployment of 5G mmWave network cells in the Kaohsiung campus. Qualcomm will be ... » read more

Power/Performance Bits: Aug. 4


Assessing code similarity Researchers from Intel, MIT, and Georgia Institute of Technology created an automated engine designed to learn what a piece of software intends to do by studying the structure of the code and analyzing syntactic differences of other code with similar behavior. The machine inferred code similarity (MISIM) program, a subset of Intel's work on machine programming, was... » read more

Semicon West Day One/Two


For years, the semiconductor and equipment industry has congregated at the annual Semicon West trade show in San Francisco. It’s an event to get an update on the latest equipment, test and packaging technologies. It’s also a good way to meet with people who you haven’t seen in a year, if not longer. It’s a great way to get a pulse on the industry. Needless to say, Semicon is a vir... » read more

Manufacturing Bits: July 14


Complementary FETs At the recent 2020 Symposia on VLSI Technology and Circuits, Imec presented a paper on a 3D complementary field-effect transistor (CFET) made on 300mm wafers. As a demonstration vehicle, Imec showed a CFET based on a 14nm process. Ideally, though, CFETs are next-generation transistors that are targeted for the 1nm node in the future. On the transistor front, chipmaker... » read more

Power/Performance Bits: June 23


Capturing waste heat Researchers at Wuhan University and University of California Los Angeles developed a hydrogel that can both cool down electronics and convert the waste heat into electricity. The thermogalvanic hydrogel consists of a polyacrylamide framework infused with water and specific ions. When they heated the hydrogel, two of the ions (ferricyanide and ferrocyanide) transferred e... » read more

The Next Advanced Packages


Packaging houses are readying their next-generation advanced IC packages, paving the way toward new and innovative system-level chip designs. These packages include new versions of 2.5D/3D technologies, chiplets, fan-out and even wafer-scale packaging. A given package type may include several variations. For example, vendors are developing new fan-out packages using wafers and panels. One is... » read more

Challenges For Compute-In-Memory Accelerators


A compute-in-memory (CIM) accelerator does not simply replace conventional logic. It's a lot more complicated than that. Regardless of the memory technology, the accelerator redefines the latency and energy consumption characteristics of the system as a whole. When the accelerator is built from noisy, low-precision computational elements, the situation becomes even more complex. Tzu-Hsian... » read more

Week In Review: Auto, Security, Pervasive Computing


Edge, cloud, data center Synopsys launched its USB4 IP and tools, already with a successful tapeout of a USB4 PHY test chip on 5nm advanced FinFET process. The Designware USB4 IP’s throughput is up to 20 or 40 Gbps, which Synopsys says is the bandwidth needed for high-performance edge AI, storage, PC, and tablet SoC designs. Also, Samsung Foundry certified Synopsys’ Design Compiler NXT for ... » read more

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