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LLM-Aided AI Accelerator Design Automation (Georgia Tech)

A technical paper titled “GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models” was published by researchers at Georgia Institute of Technology. Abstract: "The remarkable capabilities and intricate nature of Artificial Intelligence (AI) have dramatically escalated the imperative for specialized AI accelerators. Nonetheless, designing these accele... » read more

LLM-Assisted Generation Of Formal Verification Testbenches: RTL to SVA (Princeton)

A technical paper titled “From RTL to SVA: LLM-assisted generation of Formal Verification Testbenches” was published by researchers at Princeton University. Abstract: "Formal property verification (FPV) has existed for decades and has been shown to be effective at finding intricate RTL bugs. However, formal properties, such as those written as System Verilog Assertions (SVA), are time-con... » read more

Neuromorphic Hardware Accelerator For Heterogeneous Many-Accelerator SoCs

A technical paper titled “SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip” was published by researchers at Columbia University. Abstract: "Neuromorphic computing is an emerging field with the potential to offer performance and energy-efficiency gains over traditional machine learning approaches. Most neuromorphic hardware, however, has been designed wi... » read more

Integration Of Layered Semimetals With Conventional CMOS Platform

A technical paper titled “Layered semimetal electrodes for future heterogeneous electronics” was published by researchers at IIT Madras and Indian Institute of Science Education and Research. Abstract: "Integration of the emerging layered materials with the existing CMOS platform is a promising solution to enhance the performance and functionalities of the future CMOS based integrated cir... » read more

Friction Between Single Layer Graphene And An Atomic Force Microscope Tip

A technical paper titled “Dynamically tuning friction at the graphene interface using the field effect” was published by researchers at University of Illinois Urbana-Champaign and University of California Irvine. Abstract: "Dynamically controlling friction in micro- and nanoscale devices is possible using applied electrical bias between contacting surfaces, but this can also induce unwant... » read more

SRAM-Based IMC For Cryogenic CMOS Using Commercial 5 nm FinFETs

A technical paper titled “Cryogenic In-Memory Computing for Quantum Processors Using Commercial 5-nm FinFETs” was published by researchers at University of Stuttgart, Indian Institute of Technology Kanpur, University of California Berkeley, and Technical University of Munich. Abstract: "Cryogenic CMOS circuits that efficiently connect the classical domain with the quantum world are the co... » read more

Improving ML-Based Device Modeling Using Variational Autoencoder Techniques

A technical paper titled “Improving Semiconductor Device Modeling for Electronic Design Automation by Machine Learning Techniques” was published by researchers at Commonwealth Scientific and Industrial Research Organisation (CSIRO), Peking University, National University of Singapore, and University of New South Wales. Abstract: "The semiconductors industry benefits greatly from the integ... » read more

Detecting Hardware Trojans Using Analytical Modeling

A technical paper titled “Secure Run-Time Hardware Trojan Detection Using Lightweight Analytical Models” was published by researchers at National University of Singapore and Universitat Politecnica de Catalunya. Abstract: "Hardware Trojans, malicious components that attempt to prevent a chip from operating as expected, are carefully crafted to circumvent detection during the pre-deploymen... » read more

Photonic-Electronic SmartNIC With Fast and Energy-Efficient Photonic Computing Cores (MIT)

A technical paper titled “Lightning: A Reconfigurable Photonic-Electronic SmartNIC for Fast and Energy-Efficient Inference” was published by researchers at Massachusetts Institute of Technology (MIT). Abstract: "The massive growth of machine learning-based applications and the end of Moore's law have created a pressing need to redesign computing platforms. We propose Lightning, the first ... » read more

3D-Integrated Neuromorphic Hardware With A Two-Level Neuromorphic “Synapse Over Neuron” Structure

A technical paper titled “3D Neuromorphic Hardware with Single Thin-Film Transistor Synapses Over Single Thin-Body Transistor Neurons by Monolithic Vertical Integration” was published by researchers at Korea Advanced Institute of Science and Technology (KAIST) and SK hynix. Abstract: "Neuromorphic hardware with a spiking neural network (SNN) can significantly enhance the energy efficiency... » read more

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