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Survey of CXL Implementations and Standards (Intel, Microsoft)
By Technical Paper Link - 22 Jul, 2024 - Comments: 0

A new technical paper titled "An Introduction to the Compute Express Link (CXL) Interconnect" was published by researchers at Intel Corporation, Microsoft, and University of Washington. Abstract "The Compute Express Link (CXL) is an open industry-standard interconnect between processors and devices such as accelerators, memory buffers, smart network interfaces, persistent memory, and solid-... » read more

Improving Performance and Power Efficiency By Safely Eliminating Load Instruction Execution (ETH Zürich, Intel)
By Technical Paper Link - 22 Jul, 2024 - Comments: 0

A technical paper titled “Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution” was published by researchers at ETH Zürich and Intel Corporation.  This paper earned the Best Paper Award in the International Symposium on Computer Architecture (ISCA). Abstract: "Load instructions often limit instruction-level parallelism (ILP) in modern pr... » read more

SiC Power Electronics Packaging: Floating Die Structure and Liquid Metal Fluidic Connection (Cambridge U. )
By Technical Paper Link - 17 Jul, 2024 - Comments: 0

A new technical paper titled "Liquid Metal Fluidic Connection and Floating Die Structure for Ultralow Thermomechanical Stress of SiC Power Electronics Packaging" was published by researchers at Cambridge University. Abstract "Coefficients of thermal expansion (CTE) of various materials in packaging structure layers vary largely, causing significant thermomechanical stress in power electroni... » read more

HW Security: Flip-Flops Along Logic Gates to Prevent Synthesis Tools’ Structural Leakages (TU Dresden, Ruhr Univ. Bochum)
By Technical Paper Link - 17 Jul, 2024 - Comments: 0

A new technical paper titled "Flip-Lock: A Flip-Flop-Based Logic Locking Technique for Thwarting ML-based and Algorithmic Structural Attacks" was published by researchers at TU Dresden and Ruhr University Bochum. Abstract "Machine learning (ML) and algorithmic structural attacks have highlighted the possibility of utilizing structural leakages of an obfuscated circuit to reverse engineer th... » read more

Functional Compaction for Functional Test Sequences (Purdue University, I. Pomeranz)
By Technical Paper Link - 17 Jul, 2024 - Comments: 0

A new technical paper titled "Functional Compaction for Functional Test Sequences" was published by IEEE Fellow Irith Pomeranz at Purdue University. Abstract: "The occurrence of silent data corruption because of hardware defects in large scale data centers points to the advantages of applying functional test sequences to detect hardware defects that escape scan-based tests. When using funct... » read more

Excitonic Phenomena in TMDs (Harvard, Google, Stanford et al.)
By Technical Paper Link - 17 Jul, 2024 - Comments: 0

A new technical paper titled "Dynamical Control of Excitons in Atomically Thin Semiconductors" was published by researchers at Harvard University, Google Research, Stanford University, UC Riverside and others. Abstract "Excitons in transition metal dichalcogenides (TMDs) have emerged as a promising platform for novel applications ranging from optoelectronic devices to quantum optics and sol... » read more

6G And Beyond: Overall Vision And Survey of Research
By Technical Paper Link - 16 Jul, 2024 - Comments: 0

A new 92 page technical paper titled "6G: The Intelligent Network of Everything -- A Comprehensive Vision, Survey, and Tutorial" was published by IEEE researchers at Finland's University of Oulu. Abstract "The global 6G vision has taken its shape after years of international research and development efforts. This work culminated in ITU-R's Recommendation on "IMT-2030 Framework". While the d... » read more

Step Towards 3D PICs: Low Loss Fiber-Coupled Interconnects (UIUC)
By Technical Paper Link - 16 Jul, 2024 - Comments: 0

A new technical paper titled "Low loss fiber-coupled volumetric interconnects fabricated via direct laser writing" was published by researchers at University of Illinois Urbana-Champaign (UIUC). Abstract "Photonic integrated circuits (PICs) are vital for high-speed data transmission. However, optical routing is limited in PICs composed of only one or a few stacked planes. Further, coupling ... » read more

NVMs: In-Memory Fine-Grained Integrity Verification Technique (Intel Labs, IISc)
By Technical Paper Link - 16 Jul, 2024 - Comments: 0

A new technical paper titled "iMIV: in-Memory Integrity Verification for NVM" was published by researchers at Intel Labs and Indian Institute of Science (IISc), Bengaluru. Abstract "Non-volatile Memory (NVM) could bridge the gap between memory and storage. However, NVMs are susceptible to data remanence attacks. Thus, multiple security metadata must persist along with the data to protect th... » read more

In Situ Backpropagation Strategy That Progressively Updates Neural Network Layers Directly in HW (TU Eindhoven)
By Technical Paper Link - 16 Jul, 2024 - Comments: 0

A new technical paper titled "Hardware implementation of backpropagation using progressive gradient descent for in situ training of multilayer neural networks" was published by researchers at Eindhoven University of Technology. Abstract "Neural network training can be slow and energy-expensive due to the frequent transfer of weight data between digital memory and processing units. Neuromorp... » read more

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