Author's Latest Posts


Making high-capacity data caches more efficient


Source: Researchers from MIT, Intel, and ETH Zurich Xiangyao Yu (MIT), Christopher J. Hughes (Intel), Nadathur Satish (Intel) Onur Mutlu (ETH Zurich), Srinivas Devadas (MIT) Technical Paper link MIT News article As the transistor counts in processors have gone up, the relatively slow connection between the processor and main memory has become the chief impediment to improving comp... » read more

How Neural Networks Think (MIT)


Source: MIT’s Computer Science and Artificial Intelligence Laboratory, David Alvarez-Melis and Tommi S. Jaakkola Technical paper link MIT article General-purpose neural net training Artificial-intelligence research has been transformed by machine-learning systems called neural networks, which learn how to perform tasks by analyzing huge volumes of training data, reminded MIT research... » read more

New AI algorithm monitors sleep with radio waves (MIT & Mass General)


Source: MIT and Massachusetts General Hospital. Mingmin Zhao, Shichao Yue, Dina Katabi, Tommi Jaakkola, Matt Bianchi Monitoring sleep with AI To make it easier to diagnose and study sleep problems, researchers at MIT and Massachusetts General Hospital have devised a new way to monitor sleep stages without sensors attached to the body by using a device that employs an advanced artific... » read more

Neural Adaptive Video Streaming with Pensieve (MIT-CSAIL)


Source:  MIT-CSAIL Hongzi Mao, Ravi Netravali, Mohammad Alizadeh For technical paper link, click here  and MIT's news here Machine-learning system for smoother streaming To combat the frustration of video buffering or pixelation, researchers at MIT’s Computer Science and Artificial Intelligence Laboratory (CSAIL) have developed “Pensieve,” an artificial intelligence system that ... » read more

System enables large speedups — as much as 88-fold — on common parallel-computing algorithms (MIT)


Source: MIT/ CSAIL: Suvinay Subramanian, Mark C. Jeffrey, Maleen Abeydeera, Hyun Ryong Lee, Victor A. Ying, Joel Emer, Daniel Sanchez As is commonly known, the chips in most modern desktop computers have four cores or processing units, which can run different computational tasks in parallel, but that the chips of the future could have dozens or even hundreds of cores, and taking advantage o... » read more

Deep Learning Robust Grasps with Synthetic Point Clouds & Analytic Grasp Metrics (UC Berkeley)


Source: The research was the work of Jeffrey Mahler, Jacky Liang, Sherdil Niyaz, Michael Laskey, Richard Doan, Xinyu Liu, Juan Aparicio Ojea, and Ken Goldberg with support from the AUTOLAB team at UC Berkeley. Nimble-fingered robots enabled by deep learning Grabbing awkwardly shaped items that humans regularly pick up daily is not so easy for robots, as they don’t know where to apply grip... » read more

Multi-Robot Path Planning For Swarm of Robots that Can Both Fly, Drive (MIT)


Source: MIT/CSAIL.Brandon Araki, John Strang, Sarah Pohorecky, Celine Qiu, Tobias Naegeli, and Daniela R Researchers from MIT’s Computer Science and Artificial Intelligence Laboratory (CSAIL) propose that if robots could be programmed to both walk and take flight, it would open up possibilities including machines that could fly into construction areas or disaster zones that aren’t near ... » read more

Synthetic Sensors: Towards General-Purpose Sensing (Carnegie Mellon Univ)


Source: Carnegie Mellon University, Human-Computer Interaction Institute, Gierad Laput, Yang Zhang, Chris Harrison Although ubiquitous sensors seem almost synonymous with the IoT, some Carnegie Mellon University researchers say sensing with a single, general purpose sensor for each room may be better. The team has developed a plug-in sensor package that monitors multiple phenomena — sou... » read more

Memory Model Verification at the Trisection of Software, Hardware, and ISA (Princeton)


Source: Princeton University, Caroline Trippel, Yatin A. Manerkar, Daniel Lustig*, Michael Pellauer*, Margaret Martonosi *NVIDIA Princeton University researchers have discovered a series of errors in the RISC-V instruction specification that now are leading to changes in the new system, which seeks to facilitate open-source design for computer chips. In testing a technique they created for... » read more

Design For Noise (DfN)


By Riko Radojcic and Yanfeng Li Abstract: This white paper describes the typical characteristics of electrical noise, and summarizes the current standard practices for managing noise in semiconductor devices. The impact of the technology trends – and specifically CMOS scaling - on noise amplitude and circuit sensitivity to noise are presented, and the requirements for coping with this emergi... » read more

← Older posts