Author's Latest Posts


Plasticine: A Reconfigurable Architecture For Parallel Patterns (Stanford)


Source: Stanford University Stanford University has been developing Plasticine, which allows parallel patterns to be reconfigured. "ABSTRACT Reconfigurable architectures have gained popularity in recent years as they allow the design of energy-efficient accelerators. Fine-grain fabrics (e.g. FPGAs) have traditionally suffered from performance and power inefficiencies due to bit-level ... » read more

Checkmate: Breaking The Memory Wall With Optimal Tensor Rematerialization


Source: Published on arXiv 10/7/ 2019   Paras Jain Ajay Jain Aniruddha Nrusimha Amir Gholami Pieter Abbeel Kurt Keutzer Ion Stoica Joseph E. Gonzalez A recent paper published on arXiv by a team of UC Berkeley researchers notes that neural networks are increasingly impeded by the limited capacity of on-device GPU memory. The UC Berkeley team uses off-the-shel... » read more

Design Comparison of SiC MOSFETs for Linear-Mode Operation


Source: US Army Research Lab Authors: Heather O'Brien, Damian Urciuoli, Aderinto Ogunniyi, Brett Hull August 2019 "Abstract: Silicon carbide metal-oxide semiconductor field-effect transistors (MOSFETs) were designed and fabricated for linear-mode applications. The MOSFETs have a chip area of 3.3 ? 3.3 mm and a voltage-blocking rating up to 1200 V. The device design parameters, such as chan... » read more

Enabling Practical Processing in and near Memory for Data-Intensive Computing


Source: ETH Zurich and Carnegie Mellon University Talk at DAC 2019. Technical Paper link » read more

Copy-Row DRAM (CROW) : Substrate for Improving DRAM


Source/Credit: ETH Zurich & Carnegie Mellon University Click here for the technical paper and here for the power point slides » read more

U.S. Senate Report On The Equifax Breach


Source: U.S. Senate, Permanent Subcommittee On Investigations Committee on Homeland Security and Governmental Affairs Here's the link to the U.S. Senate report on the Equifax breach » read more

Machine Learning Based Prediction: Health Behavior on BP


Source: UC San Diego Jacobs School of Engineering, Po-Han Chiang and Sujit Dey, Mobile Systems Design Lab, Dept. of Electrical and Computer Engineering Using wearable off-the-shelf technology and machine learning, UC San Diego researchers have developed a method to predict an individual’s blood pressure and provide personalized recommendations to lower it based on this data. The resea... » read more

Autonomous Vehicle Navigation in Rural Environments without Detailed Prior Maps (MIT)


Source: MIT CSAIL: Teddy Ort, Liam Paul, Daniela Rus According to MIT Computer Science and Artificial Intelligence Laboratory (CSAIL) researchers, navigating roads less traveled in self-driving cars is a difficult task mainly because self-driving cars are usually only tested in major cities where countless hours have been spent meticulously labeling the exact 3D positions of lanes, curbs, of... » read more

Silicon CMOS Architecture For A Spin-based Quantum Computer


Source: UNSW Sydney Authors: M. Veldhorst (1,2),  H.G.J. Eenink (2,3) , C.H. Yang (2), and A.S. Dzurak (2) 1 Qutech, TU Delft, The Netherlands 2 Centre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications,UNSW, Sydney, Australia 3 NanoElectronics Group, MESA+ Institute for Nanotechnology,University of Twente, The Netherlands Te... » read more

Making high-capacity data caches more efficient


Source: Researchers from MIT, Intel, and ETH Zurich Xiangyao Yu (MIT), Christopher J. Hughes (Intel), Nadathur Satish (Intel) Onur Mutlu (ETH Zurich), Srinivas Devadas (MIT) Technical Paper link MIT News article As the transistor counts in processors have gone up, the relatively slow connection between the processor and main memory has become the chief impediment to improving comp... » read more

← Older posts