Four Foundries Back MRAM


Four major foundries plan to offer MRAM as an embedded memory solution by this year or next, setting the stage for what finally could prove to be a game-changer for this next-generation memory technology. GlobalFoundries, Samsung, TSMC and UMC plan to start offering spin-transfer torque magnetoresistive RAM (ST-MRAM or STT-MRAM) as an alternative or a replacement to NOR flash, possibly start... » read more

What Is Spin Torque MRAM?


The memory market is going in several different directions at once. On one front, the traditional memory types, such as DRAM and flash, remain the workhorse technologies. Then, several vendors are readying the next-generation memory types. As part of an ongoing series, Semiconductor Engineering will explore where the new and traditional memory technologies are heading. For this segment, P... » read more

Memory Market: More Than ASPs At Risk


By Adrienne Downey and Jim Feldhan In June 2016, the memory market emerged from its slump after reversing its 12-month ASP decline. Since then, we’ve seen a strong rebound for ASPs in both DRAM and NAND. Contributing to this recovery was the increasing demand in memory content per device across all end markets combined with a more controlled capital investment over the past several years.... » read more

Rethinking Computing Fundamentals


New compute architectures—not just new chips—are becoming a common theme in Silicon Valley these days. The whole semiconductor industry is racing to find the fastest, cheapest, lowest-power approach to processing. The drivers of this shift are well documented. Moore's Law is slowing down, in part because it's becoming more difficult to route signals across an SoC at the latest process no... » read more

Using CNNs To Speed Up Systems


Convolutional neural networks (CNNs) are becoming one of the key differentiators in system performance, reversing a decades-old trend that equated speed with processor clock frequencies, the number of transistors, and the instruction set architecture. Even with today's smartphones and PCs, it's difficult for users to differentiate between processors with 6, 8 or 16 cores. But as the amount o... » read more

Enabling Higher System Performance With NVDIMM-N


The shift from the traditional enterprise data center to the cloud is driving an insatiable demand for increased bandwidth and lower latencies. This is fundamentally reshaping traditional memory, storage, network and computing architectures. Although the semiconductor industry has been innovating to meet the needs of these new architectures, it continues to grapple with a waning Moore’s Law t... » read more

Power/Performance Bits: July 18


Ad hoc "cache hierarchies" Researchers at MIT and Carnegie Mellon University designed a system that reallocates cache access on the fly, to create new "cache hierarchies" tailored to the needs of particular programs. Dubbed Jenga, the system distinguishes between the physical locations of the separate memory banks that make up the shared cache. For each core, Jenga knows how long it would t... » read more

Memory Buffer Chips: Satisfying Amdahl’s Law To Sustain Moore’s Law


Moore’s Law, the observation that the available transistors in an integrated circuit doubles every two years, has driven the semiconductor and IT industries to unparalleled growth over the last 50+ years. These transistors have been used in CPUs to increase the number of parallel execution units and instruction fetches, expand the levels of on-chip cache (and overall capacity), support spe... » read more

The Black Box In Auto Vehicles


Driving a modern car or truck today is like driving a complex computer system which has the scope to take people and freight from one geographic point to another through the infrastructure and, to do so, it just happens it has an engine and wheels. Among the most significant developments in automotive electronics in the last several years is the inclusion of an EDR (Event Data Recorder) in e... » read more

Power/Performance Bits: June 27


Superconducting nanowire memory cell Researchers at the University of Illinois at Urbana-Champaign and the State University of New York at Stony Brook developed a new nanoscale memory cell that provides stable memory at a smaller size than other proposed memory devices, and holds promise for successful integration with superconducting processors. The device comprises two superconducting nan... » read more

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