Manufacturing, Packaging & Materials

Top Stories

200mm Demand Surges

Despite slowdown in some areas, shortages will continue into 2021 due to lack of equipment.

The Darker Side Of Hybrid Bonding

The approach offers huge performance gains, but pitfalls remain.

AI And High-NA EUV At 3/2/1nm

EUV double patterning likely at 3nm; what comes after that is uncertain.

Emerging Apps And Challenges For Packaging

Heterogeneous integration is reshaping some markets, but not all applications require it.

EUV Challenges And Unknowns At 3nm and Below

Rising costs, complexity, and fuzzy delivery schedules are casting a cloud over next-gen lithography.

Bonding Issues For Multi-Chip Packages

Disaggregation solves some problems, but it creates new ones.

What’s Next In AI, Chips And Masks

The impact of deep learning and new technology on scaling to future nodes.

Challenges Linger For EUV

Experts at the Table: The challenges of putting EUV into production, and why DRAM will require advanced litho in the future.

Regaining The Edge In U.S. Chip Manufacturing

Taiwan and Korea are in the lead, and China could follow.

Defect Challenges Grow For IC Packaging

New equipment will help, but it's expensive and requires more steps.

More Top Stories »

Round Tables

AI And High-NA EUV At 3/2/1nm

EUV double patterning likely at 3nm; what comes after that is uncertain.

Challenges Linger For EUV

Experts at the Table: The challenges of putting EUV into production, and why DRAM will require advanced litho in the future.

Mask/Lithography Issues For Mature Nodes

Experts at the Table: Spare parts are scarce for some tools and they don't do everything, but they are nearly free to operate. That limits purchase...

What’s Next With AI In Fabs?

Where machine/deep learning is useful and where it's not.

How And Where ML Is Being Used In IC Manufacturing

Experts at the Table: ML is playing a bigger role in metrology and lithography, but it can't replace physics-based models.

More Roundtables »


Virtual Fabrication At 7/5/3nm

Using data from multiple sources to improve yield.

Challenges At 3/2nm

New structures, processes and yield/performance issues.

Using Digital Twins And DL In Lithography

How to speed up manufacturing with inverse lithography technology with complex curvilinear data.

Curvilinear Full-Chip ILT

Why inverse lithography technology has finally come of age.

Manufacturing Printed Sensors

An inside look at the unique properties and uses of this technology.

More Multimedia »

See All Posts in Manufacturing Packaging and Materials »

Latest Blogs

Perfecting The Process

Process Window Optimization Of DRAM By Virtual Fabrication

For complex 3D memory devices, conventional DRC and metrology are no longer s...
December 21, 2020
On The Mark

Regaining U.S. Chip Competitiveness

U.S. government passes important act. The SIA explains what it means.
December 17, 2020
Chip, Package, System

Adding Value With Unit Level Traceability (ULT) In Automo...

Keeping track of how a product moves through the supply chain to provide real...
IC Packaging Insights

Wafer Prep Key To Thinning SiP

Using backgrinding and die-attach film to optimize systems-in-package for con...
Connect With SEMI

Chip Equipment Billings Soar In 2020

Led by investments in China, Taiwan, and Korea, the total semiconductor equip...
Piecing It Together

Structural Integrity Of Chips

As semiconductors push toward the most advanced nodes with new packaging, rel...
November 23, 2020
Lam Tech Insights

From FinFETs To Gate-All-Around

FinFETs are reaching the end of their utility as challenges mount at the 5- a...
November 19, 2020
Material Science

Si Hardmask (Si-HM), EUV And Zero Defects

Minimizing defects in films for better yield and manufacturing results.
October 26, 2020
Meet The eBeamers

eBeam Initiative Surveys Report Upbeat Photomask Market O...

Companies from across the semiconductor ecosystem shine light on key manufact...
October 5, 2020
The Leading Edge

Beyond-Line-Of-Sight Troposcatter Communications Primer

Hardware solutions that mitigate the design challenges and meet requirements ...
July 16, 2020
Semico Spin

A Promising Future For Interconnect IP

As designs include more IP blocks and subsystems, interconnect IP vendors wil...
December 17, 2019

Knowledge Centers
Entities, people and technologies explored

  Trending Articles

2020: A Turning Point In The Chip Industry

An upbeat industry at the start of the year met one of its biggest challenges, but instead of being a headwind, it quickly turned into a tailwind.

RISC-V Verification Challenges Spread

Continuous design innovation adds to verification complexity, and pushes more companies to actually do it.

CEO Outlook: 2021

The semiconductor industry will look and behave differently this year, and not just because of the pandemic.

Why It’s So Hard To Stop Cyber Attacks On ICs

Experts at the Table: Any chip can be reverse-engineered, so what can be done to minimize the damage?

Startup Funding: December 2020

More than $1.5B in funding for 26 startups; December was a big month for AI hardware.