Author's Latest Posts

Elimination Of Die-Pop Defect By Vacuum Reflow For Ultrathin Die With Warpage In Semiconductor Packaging Assembly

Semiconductor die thickness is getting thinner over time due to improvement of power efficiency in advance power electronic packages. Ultrathin die with convex warpage can easily deteriorate the solder void removal process during solder reflow, leading to various packaging reliability issues. In particular, a new type of packaging defect phenomenon—die-pop—is observed. Vacuum reflow process... » read more

Reliability Performance Of S-Connect Module (Bridge Technology) For Heterogeneous Integration Packaging

Bridge technology is a promising heterogeneous integration (HI) solution for application-specific integrated circuits (ASICs) and high bandwidth memory (HBM). The bridge dies provide localized communications among the multiple system on chips (SoCs) in a single package. In Amkor's bridge technology, S-Connect provides die-to-die connections with fine pitch [1]. Prototype S-Connect technology wa... » read more

Enhancing Punch MLF Packaging with Edge Protection Technology

Quad Flat No-Lead (QFN) semiconductor packaging provides a small form factor as well as good electrical and thermal performance for low cost. Add demonstrated long term reliability to its benefits and it is easy to see why it has been a preferred automotive package for many years. QFNs are offered in saw and punch formats with punch being a well-defined and used solution in the automotive marke... » read more

Meeting Cost And Technology Requirements Using MLF/QFN

MicroLeadFrame (MLF)/ quad flat no-lead (QFN) packaging technology is the fastest growing IC packaging solution today. From a market segment perspective, MLF packaging solutions represent more than a 111B-unit market for 2022 across five markets: automotive, consumer, industrial, networking, and communications (Figure 1). The package solution requirements across these markets vary but, the fund... » read more

Enabling The 5G RF Front-End Module Evolution With The DSMBGA Package

The advanced SiP double-sided molded BGA platform has become an industry technology standard in this domain. Applying leading-edge design rules for 3D component placement and double-sided molding, together with conformal and compartmental shielding and in-line RF testing, delivers integration levels in a small form factor with high yield. In addition to formidable SiP capacity and DSMBGA techno... » read more

Revising 5G RF Calibration Procedures For RF IC Production Testing

Modern radio frequency (RF) components introduce many challenges to outsourced semiconductor assembly and test (OSAT) suppliers whose objective is to ensure products are assembled and tested to meet the product test specifications. The growing advancement and demand for RF products for cellphones, navigational instruments, global positioning systems, Wi-Fi, receiver/transmitter (Rx/Tx) componen... » read more

Wafer Level Void-Free Molded Underfill For High-Density Fan-out Packages

In this study, experiments and mold flow simulation results are presented for a void-free wafer level molded underfill (WLMUF) process with High-Density Fan-Out (HDFO) test vehicles using a wafer-level compression molding process. The redistribution layer (RDL)-first technology was applied with 3 layers of a fine-pitch RDL structure. The test samples comprised 11.5 x 12.5-mm2 die with tall copp... » read more

Vehicle Electrification Driving Supply Chain Evolution

Dr. Ajay Sattu, Director, Automotive Product Marketing, Amkor Technology, Inc. If the recently concluded CES 2022 is any indication, the automotive industry is yet again in the cross hairs of both consumers and industry experts alike. Whether it’s the new electric vehicle (EV) model introductions, color changing technologies, or concept cars, automotive companies are slowly transforming th... » read more

Chip-Last HDFO (High-Density Fan-Out) Interposer-PoP

Interposer Package-on-Package (PoP) technology was developed and has been in very high-volume production over the last several years for high-end mobile application processors (APs). This is due to its advantages of good package design flexibility, controllable package warpage at room temperature (25°C) and high temperature (260°C), reduced assembly manufacturing cycle time and chip-last asse... » read more

Metal Thermal Interface Material For The Next Generation FCBGA

Thermal interface materials (TIMs) have been widely adopted for improved thermal dissipation in flip chip ball grid array (FCBGA), flip chip lidded ball grid array (FCLGA) and flip chip pin grid array (FCPGA) packaging. As the next generation devices' requirements for power get even higher, enhanced thermal performance at the package level is increasingly important. A typical TIM applies a poly... » read more

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